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905-6525100 Fiches technique(PDF) 3 Page - Texas Instruments |
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905-6525100 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 35 page (power pad connected to ground) VIN3 LX3 LX3 VIN LX2 LX1 LX1 1 2 3 4 5 6 11 12 13 14 15 16 17 18 19 20 7 8 9 10 LX2 VIN2 29 28 27 26 25 24 23 22 21 30 40 39 38 37 36 35 34 33 32 31 GND VIN VIN BST3 EN3 VIN1 BST1 EN2 BST2 EN1 GND TPS65251 www.ti.com SLVSAA4F – JUNE 2010 – REVISED JULY 2015 5 Description (continued) TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD pin is asserted once sequencing is done, all PG signals are reported and a selectable end of reset time lapses. The polarity of the PGOOD signal is active high. TPS65251 also features a light load pulse skipping mode (PSM) by allowing the LOW_P pin tied to V3V. The PSM mode allows for a reduction on the input power supplied to the system when the host processor is in standby (low-activity) mode. 6 Pin Configuration and Functions RHA Package 40-Pin VQFN Top View Pin Functions PIN I/O DESCRIPTION NAME NO. Current limit setting for Buck 3. Fit a resistor from this pin to ground to set the peak current limit on the output RLIM3 1 I inductor. SS3 2 I Soft-start pin for Buck 3. Fit a small ceramic capacitor to this pin to set the converter soft-start time. Compensation for Buck 3. Fit a series RC circuit to this pin to complete the compensation circuit of this COMP3 3 O converter. FB3 4 I Feedback input for Buck 3. Connect a divider set to 0.8V from the output of the converter to ground. Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS65251 |
Numéro de pièce similaire - 905-6525100 |
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Description similaire - 905-6525100 |
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