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SLVS451G – SEPTEMBER 2003 – REVISED DECEMBER 2014

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10.3 Feature Description

10.3.1 Controller Circuit

The controller circuit of the device is based on a fixed frequency multiple feed forward controller topology. Input

voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So

changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect

and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,

only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output

voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to

generate an accurate and stable output voltage.

The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and

the inductor. An internal temperature sensor prevents the device from getting overheated in case of excessive

power dissipation.

10.3.2 Synchronous Rectifier

The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.

Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power

conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two

separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS

switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND

pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In

conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in

shutdown and allows current flowing from the battery to the output. This device however uses a special circuit

which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when

the regulator is not enabled (EN = low).

The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of

the converter. No additional components have to be added to the design to make sure that the battery is

disconnected from the output of the converter.

10.3.3 Down Regulation

In general, a boost converter only regulates output voltages which are higher than the input voltage. This device

operates differently. For example, it is able to regulate 3.0 V at the output with two fresh alkaline cells at the input

having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from

a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a down

conversion mode is implemented.

If the input voltage reaches or exceeds the output voltage, the converter changes to the conversion mode. In this

mode, the control circuit changes the behavior of the rectifying PMOS. It sets the voltage drop across the PMOS

as high as needed to regulate the output voltage. This means the power losses in the converter increase. This

has to be taken into account for thermal consideration. The down conversion mode is automatically turned off as

soon as the input voltage falls about 50 mV below the output voltage. For proper operation in down conversion

mode the output voltage should not be programmed below 50% of the maximum input voltage which can be

applied.

10.3.4 Device Enable

The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In

shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is

switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This

also means that the output voltage can drop below the input voltage during shutdown. During start-up of the

converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the

battery.

10

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