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TPS40210-Q1 Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS40210-Q1 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 47 page 1 6 5 10 2 3 7 4 8 9 FB RC COMP DIS/EN SS GND VDD ISNS GDRV BP TPS40210-Q1, TPS40211-Q1 www.ti.com SLVS861E – AUGUST 2008 – REVISED DECEMBER 2014 5 Pin Configuration and Functions DGQ Package 10-Pin PDSO PowerPAD™ Package (Top View) Pin Functions PIN I/O DESCRIPTION NAME NO. BP 9 O Regulator output. Connect a 1- μF bypass capacitor from this pin to GND. COMP 4 O Error amplifier output. Connect a control-loop compensation network between the COMP pin and the FB pin. Disable or enable. Pulling this pin high places the part into a shutdown mode. The prime characteristic of shutdown mode is a very low quiescent current. Shutdown mode disables the functionality of all blocks and DIS/EN 3 I shuts down the BP regulator. This pin has an internal 1-M Ω pulldown resistor to GND. Leaving this pin unconnected enables the device. Error amplifier inverting input. Connect a voltage divider from the output to this pin to set the output voltage. FB 5 I Connect a compensation network between this pin and COMP. GDRV 8 O Connect the gate of the power N-channel MOSFET to this pin. GND 6 — Device ground Current sense. Connect an external current-sensing resistor between this pin and GND. The voltage on this pin provides current feedback in the control loop for detecting an overcurrent condition. Declaration of an ISNS 7 I overcurrent condition occurs when ISNS pin voltage exceeds the overcurrent threshold voltage, 150 mV typical. Switching-frequency setting. Connect a capacitor from the RC pin to GND. Connect a resistor from the RC RC 1 I pin to VDD of the IC power supply and a capacitor from RC to GND. Soft-start time programming. Connect a capacitor from the SS pin to GND to program the converter soft- SS 2 I start time. This pin also functions as a time-out timer when the power supply is in an overcurrent condition. System input voltage. Connect a local bypass capacitor from this pin to GND. Depending on the amount of VDD 10 I required slope compensation, connection of this pin to the converter output might be desirable. See the Application Information section for additional details. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range unless otherwise noted (1) MIN MAX UNIT VDD –0.3 52 V Input voltage range RC, SS, FB, DIS/EN –0.3 10 V ISNS –0.3 8 V Output voltage range COMP, BP, GDRV –0.3 9 V TJ Operating junction temperature –40°C 150 °C Tstg Storage temperature –55°C 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS40210-Q1 TPS40211-Q1 |
Numéro de pièce similaire - TPS40210-Q1_15 |
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Description similaire - TPS40210-Q1_15 |
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