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TPS544C20 Fiches technique(PDF) 6 Page - Texas Instruments |
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TPS544C20 Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 74 page TPS544B20, TPS544C20 SLUSB69 – MAY 2014 www.ti.com 7.4 Thermal Information TPS544B20 THERMAL METRIC(1) UNIT TPS544C20 RθJA Junction-to-ambient thermal resistance(2) 27.5 RθJCtop Junction-to-case (top) thermal resistance(3) 13.9 RθJB Junction-to-board thermal resistance 4.0 °C/W ψJT Junction-to-top characterization parameter(4) 0.3 ψJB Junction-to-board characterization parameter(5) 3.9 RθJCbot Junction-to-case (bottom) thermal resistance(6) 0.9 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. (3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC- standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. (4) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7). (5) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7). (6) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Spacer 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated |
Numéro de pièce similaire - TPS544C20 |
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Description similaire - TPS544C20 |
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