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SM72441 Fiches technique(PDF) 8 Page - Texas Instruments |
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SM72441 Fiches technique(HTML) 8 Page - Texas Instruments |
8 / 15 page SM72441 SNOSB64G – OCTOBER 2010 – REVISED APRIL 2013 www.ti.com CONFIGURABLE SETTINGS The voltage on A0 sets the max output voltage; whereas the voltage on A2 enables MPPT update rate and limits the max boost ratio when output current is below the standby threshold. Output current limit is set by the voltage on A4 and output voltage slew rate limit is set on A6. In order to set a slew rate limit of 125V/sec, the ratio of the two resistors in A6 should be 9:1. The low current condition is detected if the voltage on AIIN is less than 0.488V (rising) and 0.293 (falling) + ΔI or if the voltage on AIOUT is less than 0.488 V (rising) and 0.293 (falling) + ΔI. If low current is detected, the converter operates in standby mode and limit the maximum duty cycle to either a 1 (buck-boost), 1.15 (boost) or 1.25 (boost) conversion ratio (programmable). In this case no MPPT will be performed. The actual value of current will depend on the gain of the current sensing amplifier circuitry that feeds the AIIN and AIOUT pins. For more complete information on the various settings based on the voltage level of A2, please refer to Table 1 below. Vfs denotes the full scale voltage of the ADC which is equal to VDDA where VDDA is a reference voltage to analog ground. A typical value for top configuration resistors (RT1 to RT4) should be 20 k Ω. Table 1. List of Configurable Modes on ADC Channel 2 Low Current ADC Channel 2 MPPT Update Time Slew Rate Detection Initial Boost Ratio Delta I Detection 0 < VADC2 < Vfs/16 1.2 ms Disabled Disabled N/A N/A 1Vfs/16 < VADC2 <2Vfs/16 38 ms Disabled Disabled N/A N/A 2Vfs/16 < VADC2 <3Vfs/16 77 ms Disabled Disabled N/A N/A 3Vfs/16 < VADC2 <4Vfs/16 38 ms Enabled Disabled N/A N/A 4Vfs/16 < VADC2 <5Vfs/16 38 ms Enabled Enabled 1.15 60 (0.3 A) 5Vfs/16 < VADC2 <6Vfs/16 38 ms Enabled Enabled 1.15 90 (0.45 A) 6Vfs/16 < VADC2 <7Vfs/16 38 ms Enabled Enabled 1.15 120(0.6 A) 7Vfs/16 < VADC2 <8Vfs/16 38 ms Enabled Enabled 1.25 60 8Vfs/16 < VADC2 <9Vfs/16 38 ms Enabled Enabled 1.25 90 9Vfs/16 < VADC2 <10Vfs/16 38 ms Enabled Enabled 1.25 120 10Vfs/16 < VADC2 <11Vfs/16 77 ms Enabled Enabled 1.15 60 11Vfs/16 < VADC2 <12Vfs/16 77 ms Enabled Enabled 1.15 90 12Vfs/16 < VADC2 <13Vfs/16 77 ms Enabled Enabled 1.15 120 13Vfs/16 < VADC2 <14Vfs/16 77 ms Enabled Enabled 1.25 60 14Vfs/16 < VADC2 <15Vfs/16 77 ms Enabled Enabled 1.25 90 15Vfs/16 < VADC2 <16Vfs/16 77 ms Enabled Enabled 1.25 120 8 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: SM72441 |
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