Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

ISL22313WFU10Z Fiches technique(PDF) 11 Page - Intersil Corporation

No de pièce ISL22313WFU10Z
Description  Low Noise, Low Power, I2C짰 Bus, 256 Taps
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  INTERSIL [Intersil Corporation]
Site Internet  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22313WFU10Z Fiches technique(HTML) 11 Page - Intersil Corporation

Back Button ISL22313WFU10Z Datasheet HTML 7Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 8Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 9Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 10Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 11Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 12Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 13Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 14Page - Intersil Corporation ISL22313WFU10Z Datasheet HTML 15Page - Intersil Corporation  
Zoom Inzoom in Zoom Outzoom out
 11 / 15 page
background image
11
FN6421.0
July 17, 2007
Device Address (A1, A0)
The address inputs are used to set the least significant 2 bits
of the 7-bit I2C interface slave address. A match in the slave
address serial data stream must match with the Address
input pins in order to initiate communication with the
ISL22313. A maximum of four ISL22313 devices may
occupy the I2C serial bus (see Table 3).
Principles of Operation
The ISL22313 is an integrated circuit incorporating one DCP
with its associated registers, non-volatile memory and an I2C
serial interface providing direct communication between a
host and the potentiometer and memory. The resistor array
is comprised of individual resistors connected in series. At
either end of the array and between each resistor is an
electronic switch that transfers the potential at that point to
the wiper.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered down, the last value stored in
IVR will be maintained in the non-volatile memory. When
power is restored, the contents of the IVR are recalled and
loaded into the WR to set the wiper to the initial value.
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL pins). The RW pin of the DCP is
connected to intermediate nodes, and is equivalent to the
wiper terminal of a mechanical potentiometer. The position
of the wiper terminal within the DCP is controlled by an 8-bit
volatile Wiper Register (WR). When the WR of a DCP
contains all zeroes (WR[7:0]= 00h), its wiper terminal (RW)
is closest to its “Low” terminal (RL). When the WR register of
a DCP contains all ones (WR[7:0]= FFh), its wiper terminal
(RW) is closest to its “High” terminal (RH). As the value of
the WR increases from all zeroes (0) to all ones (255
decimal), the wiper moves monotonically from the position
closest to RL to the position closest to RH. At the same time,
the resistance between RW and RL increases monotonically,
while the resistance between RH and RW decreases
monotonically.
While the ISL22313 is being powered up, the WR is reset to
80h (128 decimal), which locates RW roughly at the center
between RL and RH. After the power supply voltage
becomes large enough for reliable non-volatile memory
reading, the WR will be reloaded with the value stored in a
non-volatile Initial Value Register (IVR).
The WR and IVR can be read or written to directly using the
I2C serial interface as described in the following sections.
Memory Description
The ISL22313 contains one non-volatile 8-bit Initial Value
Register (IVR), fourteen General Purpose non-volatile 8-bit
registers and two volatile 8-bit registers: Wiper Register (WR)
and Access Control Register (ACR). Memory map of ISL22313
is in Table 1. The non-volatile register (IVR) at address 0,
contains initial wiper position and volatile register (WR) contains
current wiper position.
The non-volatile IVR and volatile WR registers are
accessible with the same address.
The Access Control Register (ACR) contains information
and control bits described below in Table 2.
The VOL bit (ACR[7]) determines whether the access to
wiper registers WR or initial value registers IVR.
If VOL bit is 0, the non-volatile IVR register is accessible. If
VOL bit is 1, only the volatile WR is accessible. Note: Value
is written to IVR register also is written to the WR. The
default value of this bit is 0.
The SHDN bit (ACR[6]) disables or enables Shutdown mode.
When this bit is 0, i.e. DCP is forced to end-to-end open
circuit and RW is shorted to RL as shown on Figure 15.
Default value of the SHDN bit is 1.
TABLE 1. MEMORY MAP
ADDRESS
(hex)
NON-VOLATILE
VOLATILE
10
N/A
ACR
FReserved
E
General Purpose
N/A
D
General Purpose
N/A
C
General Purpose
N/A
B
General Purpose
N/A
A
General Purpose
N/A
9
General Purpose
N/A
8
General Purpose
N/A
7
General Purpose
N/A
6
General Purpose
N/A
5
General Purpose
N/A
4
General Purpose
N/A
3
General Purpose
N/A
2
General Purpose
N/A
1
General Purpose
N/A
0IVR
WR
TABLE 2. ACCESS CONTROL REGISTER (ACR)
BIT #
7
6
5
4
3
210
NAME
VOL
SHDN
WIP
0
0
000
ISL22313


Numéro de pièce similaire - ISL22313WFU10Z

FabricantNo de pièceFiches techniqueDescription
logo
Intersil Corporation
ISL22313WFU10Z INTERSIL-ISL22313WFU10Z Datasheet
623Kb / 15P
   Single Digitally Controlled Potentiometer XDCP
ISL22313WFU10Z INTERSIL-ISL22313WFU10Z Datasheet
623Kb / 15P
   Single Digitally Controlled Potentiometer (XDCP??
logo
Renesas Technology Corp
ISL22313WFU10Z RENESAS-ISL22313WFU10Z Datasheet
1Mb / 15P
   Single Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power, I2C
August 18, 2016
logo
Intersil Corporation
ISL22313WFU10Z-TK INTERSIL-ISL22313WFU10Z-TK Datasheet
623Kb / 15P
   Single Digitally Controlled Potentiometer (XDCP??
More results

Description similaire - ISL22313WFU10Z

FabricantNo de pièceFiches techniqueDescription
logo
Intersil Corporation
ISL22346WMVEP INTERSIL-ISL22346WMVEP Datasheet
99Kb / 3P
   Low Noise, Low Power I2C짰 Bus, 128 Taps
ISL22316WMUEP INTERSIL-ISL22316WMUEP Datasheet
102Kb / 3P
   Low Noise, Low Power I2C짰 Bus, 128 Taps
ISL22326WMVEP INTERSIL-ISL22326WMVEP Datasheet
101Kb / 3P
   Low Noise, Low Power, I2C짰 Bus, 128 Taps
ISL22316WMUEP INTERSIL-ISL22316WMUEP Datasheet
103Kb / 3P
   Low Noise, Low Power I2C짰 Bus, 128 Taps
November 11, 2011
X9250 INTERSIL-X9250 Datasheet
359Kb / 20P
   Low Noise/Low Power/SPI Bus/256 Taps
ISL22343TFV20Z INTERSIL-ISL22343TFV20Z Datasheet
738Kb / 19P
   Low Noise, Low Power, I2C Bus, 256 Taps
August 17, 2015
ISL90840 INTERSIL-ISL90840 Datasheet
1Mb / 12P
   Low Noise, Low Power I2C Bus, 256 Taps
ISL90810 INTERSIL-ISL90810 Datasheet
1Mb / 11P
   Low Noise/Low Power/I2C Bus/256 Taps
ISL95810 INTERSIL-ISL95810_06 Datasheet
1Mb / 13P
   Low Noise, Low Power I2C Bus, 256 Taps
ISL90842 INTERSIL-ISL90842 Datasheet
1Mb / 12P
   Low Noise, Low Power, I2C Bus, 256 Taps
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com