Moteur de recherche de fiches techniques de composants électroniques |
|
ICS853S310I Fiches technique(PDF) 10 Page - Integrated Device Technology |
|
ICS853S310I Fiches technique(HTML) 10 Page - Integrated Device Technology |
10 / 17 page ICS853S310CVI REVISION A NOVEMBER 17, 2010 10 ©2010 Integrated Device Technology, Inc. ICS853S310I Data Sheet LOW SKEW, 1-TO-8 DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER Recommendations for Unused Output Pins Inputs: PCLK/nPCLK Inputs For applications not requiring the use of a differential input, both the PCLK and nPCLK pins can be left floating. Though not required, but for additional protection, a 1k Ω resistor can be tied from PCLK to ground. LVPECL Control Pins The control pin has an internal pulldown; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. Outputs: LVPECL Outputs All unused LVPECL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. Termination for 3.3V LVPECL Outputs The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. The differential outputs are low impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed to drive 50 Ω transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 4A and 4B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. Figure 4A. 3.3V LVPECL Output Termination Figure 4B. 3.3V LVPECL Output Termination 3.3V V CC - 2V R1 50 Ω R2 50 Ω RTT Z o = 50Ω Z o = 50Ω + _ RTT = * Z o 1 ((V OH + VOL) / (VCC – 2)) – 2 3.3V LVPECL Input R1 84 Ω R2 84 Ω 3.3V R3 125 Ω R4 125 Ω Z o = 50Ω Z o = 50Ω LVPECL Input 3.3V 3.3V + _ |
Numéro de pièce similaire - ICS853S310I |
|
Description similaire - ICS853S310I |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |