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MAX1265 Fiches technique(PDF) 8 Page - Maxim Integrated Products |
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MAX1265 Fiches technique(HTML) 8 Page - Maxim Integrated Products |
8 / 19 page 265ksps, +3V, 6-/2-Channel, 12-Bit ADCs with +2.5V Reference and Parallel Interface 8 _______________________________________________________________________________________ Pin Description (continued) PIN MAX1267 REF 21 25 MAX1265 NAME Bandgap Reference Buffer Output/External Reference Input. Add a 4.7µF capacitor to GND when using the internal reference. FUNCTION 26 22 VDD Analog +2.7V to +3.6V Power Supply. Bypass with a 0.1µF capacitor to GND. 27 23 D11 Tri-State Digital Output (D11) 28 24 D10 Tri-State Digital Output (D10) ________________Detailed Description Converter Operation The MAX1265/MAX1267 ADCs use a successive- approximation (SAR) conversion technique and an input track/hold (T/H) stage to convert an analog input signal to a 12-bit digital output. This output format provides an easy interface to standard microprocessors (µPs). Figure 2 shows the simplified internal architecture of the MAX1265/MAX1267. Single-Ended and Pseudo-Differential Operation The sampling architecture of the ADC’s analog com- parator is illustrated in the equivalent input circuit in Figure 3. In single-ended mode, IN+ is internally switched to channels CH0–CH5 for the MAX1265 (Figure 3a) and to CH0–CH1 for the MAX1267 (Figure 3b), while IN- is switched to COM (Table 2). In differen- tial mode, IN+ and IN- are selected from analog input pairs (Table 3) and are internally switched to either of T/H TRI-STATE, BIDIRECTIONAL I/O INTERFACE 12 17k Ω 12 SUCCESSIVE- APPROXIMATION REGISTER CHARGE REDISTRIBUTION 12-BIT DAC CLOCK ANALOG INPUT MULTIPLEXER CONTROL LOGIC AND LATCHES REF REFADJ 1.22V REFERENCE D0–D11 12-BIT DATA BUS (CH5) (CH4) (CH3) (CH2) CH1 CH0 COM CLK CS WR RD INT ( ) ARE FOR MAX1265 ONLY. VDD GND MAX1265 MAX1267 AV = 2.05 COMP Figure 2. Simplified Functional Diagram of 6-/2-Channel MAX1265/MAX1267 |
Numéro de pièce similaire - MAX1265 |
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Description similaire - MAX1265 |
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