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Moteur de recherche de fiches techniques de composants électroniques |
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M34250M2 Fiches technique(PDF) 8 Page - Mitsubishi Electric Semiconductor |
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M34250M2 Fiches technique(HTML) 8 Page - Mitsubishi Electric Semiconductor |
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8 / 58 page  MITSUBISHI ELECTRIC 8 MITSUBISHI MICROCOMPUTERS 4250 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER Functions XOR operation OR operation AND operation Not available Logic operation function selection bits Logic operation selection register LO at reset : 002 at RAM back-up : 002 LO1 0 0 1 1 W LO0 0 1 0 1 LO1 LO0 Note: “W” represents write enabled. Logic operation selection register (5) Port F (F0, F1) 2-bit I/O port. For input use, set the latch of the specified bit to “1.” The output structure is the N-channel open-drain. (6) Port S (S0–S3) 4-bit I/O port. Port S has the logic operation (LGOP) function. For input (logic operation included) use, set the latch of the specified bit to “1.” The output structure is the N-channel open-drain. When performing the logic operation, select the logic operation function with the logic operation selection register LO. Set the contents of register LO through register A with the TLOA instruction. When the LGOP instruction is executed, the logic operation selected with the register LO is performed between the contents of register A and the contents of port S, and its result is stored in register A. |
Numéro de pièce similaire - M34250M2 |
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Description similaire - M34250M2 |
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