 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
LTC1707 Fiches technique(PDF) 6 Page - Linear Technology |
|
||||||||||||||||||||||||||||||
LTC1707 Fiches technique(HTML) 6 Page - Linear Technology |
|
|
6 / 16 page  6 LTC1707 Main Control Loop The LTC1707 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current com- parator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by the voltage on the ITH pin, which is the output of error amplifier EA. The VFB pin, described in the Pin Functions section, allows EA to receive an output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.8V reference, which, in turn, causes the ITH voltage to increase until the average induc- tor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse as indicated by the current reversal comparator IRCMP, or the beginning of the next cycle. The main control loop is shut down by pulling the RUN/SS pin low. Releasing RUN/SS allows an internal 2.25 µA current source to charge soft-start capacitor CSS. When CSS reaches 0.7V, the main control loop is enabled with the ITH voltage clamped at approximately 5% of its maximum value. As CSS continues to charge, ITH is gradually released, allowing normal operation to resume. Comparator OVDET guards against transient overshoots > 7.5% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTC1707 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Mode operation, simply allow the SYNC/MODE pin to float or connect it to a logic high. To disable Burst Mode operation and enable pulse skipping mode, connect the SYNC/MODE pin to GND. In this mode, efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 30mA. When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 200mA, even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the ITH voltage drops below 0.12V, the BURST comparator trips, causing the internal sleep line to go high and forcing off both internal power MOSFETs. In sleep mode, both power MOSFETs are held off and the internal circuitry is partially turned off, reducing the quies- cent current to 200 µA. The load current is now being supplied from the output capacitor. When the output voltage drops, causing ITH to rise above 0.22V, the top MOSFET is again turned on and this process repeats. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 35kHz, 1/10 the nominal frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby prevent- ing runaway. The oscillator’s frequency will progressively increase to 350kHz (or the synchronized frequency) when VFB rises above 0.3V. Frequency Synchronization The LTC1707 can be synchronized with an external TTL/CMOS compatible clock signal with an amplitude of at least 2VP-P. The frequency range of this signal must be from 385kHz to 550kHz. Do not attempt to synchronize the LTC1707 below 385kHz as this may cause abnormal operation and an undesired frequency spectrum. The top MOSFET turn-on follows the rising edge of the external source. When the LTC1707 is synchronized to an external source, the LTC1707 operates in PWM pulse skipping mode. In this mode, when the output load is very low, current comparator ICOMP remains tripped for more than one cycle and forces the main switch to stay off for the same number of cycles. Increasing the output load slightly allows con- stant frequency PWM operation to resume. This mode exhibits low output ripple as well as low audio noise and reduced RF interference while providing reasonable low current efficiency. (Refer to Functional Diagram) OPERATIO |
Numéro de pièce similaire - LTC1707 |
|
Description similaire - LTC1707 |
|
|
|
Lien URL |
| Politique de confidentialité |
| ALLDATASHEET.FR |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
