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LT1886 Fiches technique(PDF) 9 Page - Linear Technology

No de pièce LT1886
Description  Dual 700MHz, 200mA Operational Amplifier
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Fabricant  LINER [Linear Technology]
Site Internet  http://www.linear.com
Logo LINER - Linear Technology

LT1886 Fiches technique(HTML) 9 Page - Linear Technology

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LT1886
Input Considerations
The inputs of the LT1886 are an NPN differential pair
protected by back-to-back diodes (see the Simplified
Schematic). There are no series protection resistors
onboard which would degrade the input voltage noise. If
the inputs can have a voltage difference of more than 0.7V,
the input current should be limited to less than 10mA with
external resistance (usually the feedback resistor or source
resistor). Each input also has two ESD clamp diodes—one
to each supply. If an input drive exceeds the supply, limit
the current with an external resistor to less than 10mA.
The LT1886 design is a true operational amplifier with high
impedance inputs and low input bias currents. The input
offset current is a factor of ten lower than the input bias
current. To minimize offsets due to input bias currents,
match the equivalent DC resistance seen by both inputs.
The low input noise current can significantly reduce total
noise compared to a current feedback amplifier, especially
for higher source resistances.
Layout and Passive Components
With a gain bandwidth product of 700MHz the LT1886
requires attention to detail in order to extract maximum
performance. Use a ground plane, short lead lengths and
a combination of RF-quality supply bypass capacitors
(i.e., 470pF and 0.1
µF). As the primary applications have
high drive current, use low ESR supply bypass capacitors
(1
µF to 10µF). For best distortion performance with high
drive current a capacitor with the shortest possible trace
lengths should be placed between Pins 4 and 8. The
optimum location for this capacitor is on the back side of
the PC board. The DSL driver demo board (DC304) for this
part uses a Taiyo Yuden 10
µFceramic(TMK432BJ106MM).
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
frequency peaking. In general, use feedback resistors of
1k
Ω or less.
Thermal Issues
The LT1886 enhanced
θJA SO-8 package has the Vpin
fused to the lead frame. This thermal connection increases
the efficiency of the PC board as a heat sink. The PCB
material can be very effective at transmitting heat between
the pad area attached to the Vpin and a ground or power
plane layer. Copper board stiffeners and plated through-
holes can also be used to spread the heat generated by the
device. Table 1 lists the thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with 2oz copper.
This data can be used as a rough guideline in estimating
thermal resistance. The thermal resistance for each appli-
cation will be affected by thermal interactions with other
components as well as board size and shape.
Table 1. Fused 8-Lead SO Package
COPPER AREA (2oz)
TOTAL
TOPSIDE
BACKSIDE
COPPER AREA
θJA
2500 sq. mm
2500 sq. mm
5000 sq. mm
80
°C/W
1000 sq. mm
2500 sq. mm
3500 sq. mm
92°C/W
600 sq. mm
2500 sq. mm
3100 sq. mm
96°C/W
180 sq. mm
2500 sq. mm
2680 sq. mm
98°C/W
180 sq. mm
1000 sq. mm
1180 sq. mm
112°C/W
180 sq. mm
600 sq. mm
780 sq. mm
116°C/W
180 sq. mm
300 sq. mm
480 sq. mm
118°C/W
180 sq. mm
100 sq. mm
280 sq. mm
120°C/W
180 sq. mm
0 sq. mm
180 sq. mm
122°C/W
Calculating Junction Temperature
The junction temperature can be calculated from the
equation:
TJ = (PD)(θJA) + TA
TJ = Junction Temperature
TA = Ambient Temperature
PD = Device Dissipation
θJA = Thermal Resistance (Junction-to-Ambient)
As an example, calculate the junction temperature for the
circuit in Figure 1 assuming an 85
°Cambienttemperature.
The device dissipation can be found by measuring the
supply currents, calculating the total dissipation and then
subtracting the dissipation in the load.
APPLICATIO S I FOR ATIO


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