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2SK3354 Fiches technique(PDF) 4 Page - Renesas Technology Corp |
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2SK3354 Fiches technique(HTML) 4 Page - Renesas Technology Corp |
4 / 10 page Data Sheet D14131EJ4V0DS 2 2SK3354 ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 60 V, VGS = 0 V10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0V ±10 µA Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 2.5 V Forward Transfer Admittance | yfs |VDS = 10 V, ID = 42 A35 59 S Drain to Source On-state Resistance RDS(on)1 VGS = 10 V, ID = 42 A6.3 8.0 m Ω RDS(on)2 VGS = 4 V, ID = 42 A8.0 12 m Ω Input Capacitance Ciss VDS = 10 V 6300 pF Output Capacitance Coss VGS = 0 V 1000 pF Reverse Transfer Capacitance Crss f = 1 MHz 490 pF Turn-on Delay Time td(on) VDD = 30 V, ID = 42 A 100 ns Rise Time tr VGS = 10 V 1500 ns Turn-off Delay Time td(off) RG = 10 Ω 300 ns Fall Time tf 440 ns Total Gate Charge QG VDD = 48 V 106 nC Gate to Source Charge QGS VGS = 10 V20 nC Gate to Drain Charge QGD ID = 83 A30 nC Body Diode Forward Voltage VF(S-D) IF = 83 A, VGS = 0 V1.0 V Reverse Recovery Time trr IF = 83 A, VGS = 0 V55 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 100 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY RG = 25 Ω 50 Ω PG. L VDD VGS = 20 → 0 V BVDSS IAS ID VDS Starting Tch VDD D.U.T. TEST CIRCUIT 3 GATE CHARGE TEST CIRCUIT 2 SWITCHING TIME PG. RG 0 VGS D.U.T. RL VDD τ = 1 s µ Duty Cycle ≤ 1% VGS Wave Form ID Wave Form VGS 10% 90% VGS 10% 0 ID 90% 90% td(on) tr td(off) tf 10% τ ID 0 ton toff PG. 50 Ω D.U.T. RL VDD IG = 2 mA |
Numéro de pièce similaire - 2SK3354_15 |
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Description similaire - 2SK3354_15 |
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