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HS-565ARH Fiches technique(PDF) 5 Page - Intersil Corporation |
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HS-565ARH Fiches technique(HTML) 5 Page - Intersil Corporation |
5 / 10 page 5 Specifications HS-565ARH Settling Time (Note 3) TS1 VSSD = VSSA = 0V, VCC = +15V, VEE = -15V, High Z External Load 1 -55oC to +125oC - 350 500 ns TS2 VSSD = VSSA = 0V, VCC = +15V, VEE = -15V, 75 Ω External Load 1 -55oC to +125oC - 150 250 ns Full Scale Transition Rise Time TRISE VSSD = VSSA = 0V, VCC = +15V, VEE = -15V 1 -55oC to +125oC - 15 30 ns Fall Time TFALL VSSD = VSSA = 0V, VCC = +15V, VEE = -15V 1 -55oC to +125oC - 30 60 ns NOTES: 1. The parameters listed in Table 3 are controlled via design or process and are not tested. These parameters are characterized upon initial design release. 2. 24 lead DIP package only. 3. Reference the Settling Time discussion and Figure 3. TABLE 4. POST 100 K RAD ELECTRICAL PERFORMANCE Post 100K RAD Electrical Performance Is Per Table 1 (+25oC Only) Except As Follows: PARAMETER SYMBOL CONDITIONS: +25oC ONLY LIMITS UNITS MIN MAX DIGITAL INPUTS Low Current IIL VIN = 0.0V -40 - µA Low Voltage VIL (Note 1) - 0.5 V High Voltage VIH (Note 1) 2.5 - V UNIPOLAR Full Scale Error AE Figure 3, R2 = 50 Ω Fixed - ±0.85 % of F.S. BIPOLAR Offset Error BPOE Figure 4, R3 and R4 = 50 Ω Fixed - ±0.25 % of F.S Zero Error BPZE Figure 5, R3 and R4 = 50 Ω Fixed - ±0.25 % of F.S. Full Scale Error BPAE Figure 5, R3 and R4 = 50 Ω Fixed - ±0.85 % of F.S. Differential Nonlinearity DLE Monotonicity Guaranteed - ±1.0 LSB Accuracy ILE Error Relative to Full Scale - ±1.0 LSB NOTES: 1. This parameter is an applied condition of test. TABLE 5. BI DELTA PARAMETERS ( ±25oC) PARAMETER DELTA LIMIT ICC ±1.18mA IEE ±1.45mA IOUT1 ±240µA IOUT2 ±240µA VOS ±0.02% AE ±0.15% BPOE ±0.10% BPZE ±0.10% IIL ±1.0µA IIH ±40nA TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE LIMITS UNITS MIN TYP MAX Spec Number 518795 |
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