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FDN537N Fiches technique(PDF) 2 Page - Fairchild Semiconductor |
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FDN537N Fiches technique(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page ©2013 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDN537N Rev.C2 Electrical Characteristics T J = 25 °C unless otherwise noted Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Units BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 30 V ΔBV DSS ΔT J Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C 18 mV/°C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA1.2 1.8 3.0 V ΔV GS(th) ΔT J Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 mV/°C rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 6.5 A 19 23 m Ω VGS = 4.5 V, ID = 6.0 A 25 36 VGS = 10 V, ID = 6.5 A, TJ = 125 °C 25 30 gFS Forward Transconductance VDD = 5 V, ID = 6.5 A 24 S Ciss Input Capacitance VDS = 15 V, VGS = 0 V, f = 1 MHz 360 465 pF Coss Output Capacitance 143 180 pF Crss Reverse Transfer Capacitance 22 35 pF Rg Gate Resistance 1.0 Ω td(on) Turn-On Delay Time VDD = 15 V, ID = 6.5 A, VGS = 10 V, RGEN = 6 Ω 510 ns tr Rise Time 110 ns td(off) Turn-Off Delay Time 11 19 ns tf Fall Time 110 ns Qg(TOT) Total Gate Charge VGS = 0 V to 10 V VDD = 15 V ID = 6.5 A 6.0 8.4 nC Total Gate Charge VGS = 0 V to 4.5 V 3.0 4.2 nC Qgs Total Gate Charge 1.2 nC Qgd Gate to Drain “Miller” Charge 1.1 nC VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 6.5 A (Note 2) 0.86 1.2 V trr Reverse Recovery Time IF = 6.5 A, di/dt = 100 A/μs 14 22 ns Qrr Reverse Recovery Charge 3 10 nC NOTES: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. 80 °C/W when mounted on a 1 in2 pad of 2 oz copper a) 180 °C/W when mounted on a minimum pad. b) |
Numéro de pièce similaire - FDN537N |
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Description similaire - FDN537N |
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