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AD7755 Fiches technique(PDF) 4 Page - Analog Devices |
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AD7755 Fiches technique(HTML) 4 Page - Analog Devices |
4 / 16 page REV. B AD7755 –4– ABSOLUTE MAXIMUM RATINGS * (TA = +25 °C unless otherwise noted) AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V Analog Input Voltage to AGND V1P, V1N, V2P and V2N . . . . . . . . . . . . . . . –6 V to +6 V Reference Input Voltage to AGND . . –0.3 V to AVDD + 0.3 V Digital Input Voltage to DGND . . . –0.3 V to DVDD + 0.3 V Digital Output Voltage to DGND . . –0.3 V to DVDD + 0.3 V Operating Temperature Range Industrial (A, B Versions) . . . . . . . . . . . . . –40 °C to +85°C Storage Temperature Range . . . . . . . . . . . . –65 °C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150 °C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7755 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE 24-Lead Plastic DIP, Power Dissipation . . . . . . . . . . 450 mW θ JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105 °C/W Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . . 260 °C 24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW θ JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112 °C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215 °C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 °C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TERMINOLOGY MEASUREMENT ERROR The error associated with the energy measurement made by the AD7755 is defined by the following formula: Percentage Error True Energy =× Energy Registered by the AD7755 – True Energy 100% PHASE ERROR BETWEEN CHANNELS The HPF (High Pass Filter) in Channel 1 has a phase lead response. To offset this phase response and equalize the phase response between channels, a phase correction network is also placed in Channel 1. The phase correction network matches the phase to within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2° over a range 40 Hz to 1 kHz. See Figures 22 and 23. POWER SUPPLY REJECTION This quantifies the AD7755 measurement error as a percentage of reading when the power supplies are varied. For the ac PSR measurement a reading at nominal supplies (5 V) is taken. A 200 mV rms/100 Hz signal is then introduced onto the supplies and a second reading obtained under the same input signal levels. Any error introduced is expressed as a per- centage of reading—see Measurement Error definition. For the dc PSR measurement a reading at nominal supplies (5 V) is taken. The supplies are then varied ±5% and a second reading is obtained with the same input signal levels. Any error introduced is again expressed as a percentage of reading. ADC OFFSET ERROR This refers to the dc offset associated with the analog inputs to the ADCs. It means that with the analog inputs connected to AGND, the ADCs still see a small dc signal (offset). The offset decreases with increasing gain in channel V1. This specification is measured at a gain of 1. At a gain of 16, the dc offset is typi- cally less than 1 mV. However, when the HPF is switched on, the offset is removed from the current channel and the power calculation is not affected by this offset. GAIN ERROR The gain error of the AD7755 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. It is measured with a gain of 1 in channel V1. The difference is expressed as a percentage of the ideal frequency. The ideal frequency is obtained from the AD7755 transfer func- tion—see Transfer Function section. GAIN ERROR MATCH The gain error match is defined as the gain error (minus the offset) obtained when switching between a gain of 1 and a gain of 2, 8, or 16. It is expressed as a percentage of the out- put frequency obtained under a gain of 1. This gives the gain error observed when the gain selection is changed from 1 to 2, 8 or 16. OBSOLETE |
Numéro de pièce similaire - AD7755_15 |
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Description similaire - AD7755_15 |
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