IRF6633

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7

DirectFET

™ Substrate and PCB Layout, MP Outline

(Medium Size Can, P-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

Fig 18.

Diode Reverse Recovery Test Circuit for N-Channel

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

Driver Gate Drive

Inductor Curent

D =

P.W.

Period

*

Inductor Current

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

• Driver same type as D.U.T.

• D.U.T. - Device Under Test

+

-

+

+

+

-

-

-

ƒ

„

‚

D.U.T



G- Gate

D- Drain

S- Source

S

S

G

D

D

D

D