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ADC12038 Fiches technique(PDF) 8 Page - Texas Instruments

No de pièce ADC12038
Description  Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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ADC12038 Fiches technique(HTML) 8 Page - Texas Instruments

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ADC12030, ADC12032, ADC12034
ADC12038, ADC12H030, ADC12H032
ADC12H034, ADC12H038
SNAS080K – JULY 1999 – REVISED MARCH 2013
www.ti.com
Converter Electrical Characteristics (continued)
The following specifications apply for V
+ = V
A+ = VD+ = +5.0 VDC, VREF+ = +4.096 VDC, VREF− = 0 VDC, 12-bit + sign
conversion mode, fCK = fSK = 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, fCK = fSK = 5 MHz for
the ADC12030, ADC12032, ADC12034 and ADC12038, RS = 25Ω, source impedance for VREF+ and VREF− ≤ 25Ω, fully-
differential input with fixed 2.048V common-mode voltage, and 10(tCK) acquisition time unless otherwise specified. Boldface
limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.
(1)(2)(3)
Units
Parameter
Test Conditions
Typical (4)
Limits (5)
(Limits)
On Channel = 5V and Off Channel = 0V
−0.01
−0.3
µA (min)
Off Channel Leakage CH0–CH7
and COM Pins (13)
On Channel = 0V and Off Channel = 5V
0.01
0.3
µA (max)
On Channel = 5V and Off Channel = 0V
0.01
0.3
µA (max)
On Channel Leakage CH0–CH7
and COM Pins (13)
On Channel = 0V and Off Channel = 5V
−0.01
−0.3
µA (min)
MUXOUT1 and MUXOUT2 Leakage
VMUXOUT = 5.0V or VMUXOUT = 0V
0.01
0.3
µA (max)
Current
RON
MUX On Resistance
VIN = 2.5V and VMUXOUT = 2.4V
850
1150
Ω (max)
RON Matching Chan-to-Chan
VIN = 2.5V and VMUXOUT = 2.4V
5
%
Chan-to-Chan Crosstalk
VIN = 5 VP-P, fIN = 40 kHz
−72
dB
MUX Bandwidth
90
kHz
(13) Channel leakage current is measured after the channel selection.
DC and Logic Electrical Characteristics
The following specifications apply for V
+ = V
A+ = VD+ = +5.0 VDC, VREF+ = +4.096 VDC, VREF− = 0 VDC, 12-bit + sign
conversion mode, fCK = fSK = 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, fCK = fSK = 5 MHz for
the ADC12030, ADC12032, ADC12034 and ADC12038, RS = 25Ω, source impedance for VREF+ and VREF− ≤ 25Ω, fully-
differential input with fixed 2.048V common-mode voltage, and 10(tCK) acquisition time unless otherwise specified. Boldface
limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25°C.
(1) (2) (3)
Units
Parameter
Test Conditions
Typical (4)
Limits (5)
(Limits)
CCLK, CS, CONV, DI, PD AND SCLK INPUT CHARACTERISTICS
VIN(1)
Logical “1” Input Voltage
V+ = 5.5V
2.0
V (min)
VIN(0)
Logical “0” Input Voltage
V+ = 4.5V
0.8
V (max)
IIN(1)
Logical “1” Input Current
VIN = 5.0V
0.005
1.0
µA (max)
IIN(0)
Logical “0” Input Current
VIN = 0V
−0.005
−1.0
µA (min)
DO, EOC AND DOR DIGITAL OUTPUT CHARACTERISTICS
V+ = 4.5V, IOUT = −360 µA
2.4
V (min)
VOUT(1)
Logical “1” Output Voltage
V+ = 4.5V, IOUT = − 10 µA
4.25
V (min)
(1)
Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above VA+
or 5V below GND will not damage this device. However, errors in the conversion can occur (if these diodes are forward biased by more
than 50 mV) if the input voltage magnitude of selected or unselected analog input go above VA+ or below GND by more than 50 mV. As
an example, if VA+ is 4.5 VDC, full-scale input voltage must be ≤4.55 VDC to ensure accurate conversions.
(2)
To ensure accuracy, it is required that the VA+ and VD+ be connected together to the same power supply with separate bypass
capacitors at each V+ pin.
(3)
With the test condition for VREF (VREF+ − VREF−) given as +4.096V, the 12-bit LSB is 1.0 mV and the 8-bit LSB is 16.0 mV.
(4)
Typical figures are at TJ = TA = 25°C and represent most likely parametric norm.
(5)
Tested limits are specified to AOQL (Average Outgoing Quality Level).
8
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Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: ADC12030 ADC12032 ADC12034 ADC12038 ADC12H030 ADC12H032 ADC12H034
ADC12H038


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