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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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DAC290X-EVM Fiches technique(PDF) 2 Page - Texas Instruments |
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DAC290X-EVM Fiches technique(HTML) 2 Page - Texas Instruments |
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2 / 9 page  DAC290x-EVM 2 SBAU071B INITIAL CONFIGURATION By using jumpers and 0 Ω resistors, the DAC290x-EVM can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user should decide on the configuration and make the appro- priate connections or changes. The demonstration board comes with the following factory-set configuration: • Single clock source driving CLK_1, WRT_1, CLK_2, and WRT_2 from WRT_1 input J5. W10, R21, R32-R37, and J6-J8 not installed. • Transformer coupled outputs (1:1) using transformer T1 and T2. R43-R46, C12, C13, C22, and C23 not installed. Note that a dc-bias voltage is set at the center tap. • The converter is set to operate with the internal reference. Jumper W1 is not installed. • The full-scale output current of both DACs is set to 20mA through the FSA resistors R15 and R16 (2k Ω each). Jumper W2 is installed connecting pin 42 (GSET) to ground. • The DAC290x output is enabled (power-down mode dis- abled). Jumper W6 is installed connecting pin 37 (PD) to ground. POWER SUPPLY The DAC290x converter requires two power supplies—an analog and a digital supply. Each of the supplies may be set independently between +3.0V and +5.0V. The analog sup- ply, +VA, must be connected at banana jack J9 with the return going to banana jack J10. The digital supply, +VD, connects at banana jack J11 with the return connected to J12. When operating the DAC290x with a +3.0V digital supply, care must be taken that the amplitude of the digital data inputs has a corresponding logic level. The logic high level must not exceed the power supply by more than 0.3V. Refer to the product data sheets (DAC2900—SBAS166; DAC2902—SBAS167; DAC2904—SBAS198) for further details. All analog and digital power, and grounds are distributed by the use of power planes. INPUT CLOCK The DAC290x-EVM default configuration requires only one clock input. The clock should be applied via SMA connector WRT_1 (J5), which provides a 50 Ω terminated input. It is recommended to use a square wave clock with an amplitude of ≥ 3.0Vp-p. In order to preserve the specified performance of the DAC290x converter, the clock source should feature very low jitter. MULTIPLE INPUT CLOCKS The DAC290x-EVM evaluation board can be configured for multiple input clocks, each driving a CLK or WRT input pin. This mode would require the user to install J6, J7, J8, R32 through R37, and removal of R22 through R25. INTERNAL REFERENCE OPERATION The full-scale output current is set by applying an external resistor (R15 and R16) between the FAS1 and FAS2 pins of the DAC290x and ground. The full-scale output current can be adjusted from 20mA down to 2mA by varying R15 and R16 or changing the externally applied reference voltage. The full-scale output current, IOUTFS, is defined as follows: IOUTFS = 32 • (VREF_IN/RBIAS) where VREF_IN is the voltage at pin REF_IN and RBIAS is the resistance of R15 (for DAC1) or R16 (for DAC2). This voltage is typically +1.25V when using the internally pro- vided reference voltage source. Two potentiometers (R40 and R41) are provided to allow the user to adjust the center voltage of the DAC outputs across transformers T1 and T2. The EVM initial setup is for full-scale output current opera- tion, with the potentiometers adjusted to provide 0.5V at the center tap of the transformers. EXTERNAL REFERENCE OPERATION The internal reference can be disabled and overridden by an external reference. Two methods of external reference are provided by the EVM. The user can provide an external reference by connecting a voltage source to SMA connector J13 with Jumper W1 installed between pins 2 and 3. In addition, a reference circuit has been included on the EVM to provide a second external reference source. This source is available by placing Jumper W1 between pins 1 and 2 and adjusting potentiometer R7 to the desired voltage. The range of this circuit is from 0V to 1.25V. The specified range for external reference voltages should never exceed the limits as specified per the data sheet. POWER-DOWN MODE The DAC290x-EVM provides a means of placing the DAC290x converter into a power-down mode. This mode is activated by re-configuring Jumper W6 so that it connects the PD-pin (pin 37) to +VD. INPUT DATA The DAC290x-EVM allows the user to input I and Q digital data to the DAC using J1 and J2. The board provides series dampening 22 Ω resistors and buffering to minimize digital ringing and switching noise. The connectors also provide a path for an input clock. With the EVM set up in the single clock source mode, the user can provide a clock through J1 or J2 by installing jumper W10 and resistor R21. The 14-bit input data buses are brought in through two 34-pin headers as shown in Tables I and II. |
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Description similaire - DAC290X-EVM |
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