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STC3115 Fiches technique(PDF) 8 Page - STMicroelectronics |
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STC3115 Fiches technique(HTML) 8 Page - STMicroelectronics |
8 / 31 page Electrical characteristics STC3115 8/31 DocID023755 Rev 4 Figure 2. I2C timing diagram Table 5. I2C timing - VIO= 2.8 V, Tamb = -20 °C to 70 °C (unless otherwise specified) Symbol Parameter Min Typ Max Unit Fscl SCL clock frequency 0 - 400 kHz thd,sta Hold time (repeated) START condition 0.6 µs tlow LOW period of the SCL clock 1.3 thigh HIGH period of the SCL clock 0.6 tsu,dat Setup time for repeated START condition 0.6 thd,dat Data hold time 0 0.9 tsu,dat Data setup time 100 ns tr Rise time of both SDA and SCL signals 20+ 0.1Cb 300 ns tf Fall time of both SDA and SCL signals 20+ 0.1Cb 300 ns tsu,sto Setup time for STOP condition 0.6 µs tbuf Bus free time between a STOP and START condition 1.3 µs Cb Capacitive load for each bus line 400 pF |
Numéro de pièce similaire - STC3115 |
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Description similaire - STC3115 |
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