FM3164/FM31256

Document Number: 001-86391 Rev. *C

Page 4 of 33

Pinout

Figure 1. 14-pin SOIC pinout

CNT1

CNT2

A0

A1

CAL/PFO

RST

PFI

X1

X2

SDA

SCL

V

1

2

3

4

5

6

7

8

9

10

11

12

13

14

DD

Pin Definitions

Pin Name

I/O Type

Description

A1-A0

Input

Device Select Address 1-0. These pins are used to select one of up to 4 devices of the same type

corresponding bits contained in the slave address. The address pins are pulled down internally.

SDA

noise immunity and the output driver includes slope control for falling edges. An external pull-up

resistor is required.

SCL

Input

edge, and into the device on the rising edge. The SCL input also incorporates a Schmitt trigger input

for noise immunity.

CNT1, CNT2

Input

Event Counter Inputs. These battery-backed inputs increment counters when an edge is detected

on the corresponding CNT pin. The polarity is programmable. These pins should not be left floating.

Tie to ground if these pins are not used.

X1, X2

Input/Output 32.768 kHz crystal connection. When using an external oscillator, apply the clock to X1 and a DC

mid-level to X2. These pins should be left unconnected if RTC is not used.

RST

Input/Output Reset. This active-low output is open drain with weak pull-up. It is also an input when used as a manual

reset. This pin should be left floating if unused.

PFI

Input

Early Power-fail Input. Typically connected to an unregulated power supply to detect an early power

failure. This pin must be tied to ground if unused.

CAL/PFO

Output

Calibration/Early Power-fail Output. In calibration mode, this pin supplies a 512 Hz square-wave

output for clock calibration. In normal operation, this is the early power-fail output.

this pin should be left floating and the VBC bit should be set in the RTC register 0Bh.

Power supply Ground for the device. Must be connected to the ground of the system.

Power supply Power supply input to the device.