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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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SI3000SSI-EVB Fiches technique(PDF) 3 Page - Silicon Laboratories |
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SI3000SSI-EVB Fiches technique(HTML) 3 Page - Silicon Laboratories |
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3 / 21 page  Si3000SSI-EVB Preliminary Rev. 0.7 3 Several additional signals are required for proper operation of the serial interface. As mentioned in the clock generation section, an MCLK must be provided for the Si3000 to operate. FSYNC, SCLK, SDI and SDO are also required signals to operate the Si3000. FSYNC provides the sychronization for the audio samples. This signal operates at the sample rate. A high to low transition marks the beginning of a new frame. SCLK is an output of the Si3000 providing the bit clock for the audio samples. Data is valid on the falling edge of SCLK following a FSYNC start transition. SDI is audio samples to be transmitted and SDO is audio samples received. The serial port signals are also used during a secondary frame to read and write the internal registers of the Si3000. Refer to the Si3000 data sheet for more details on internal registers and how to read and write those registers. When using the board in stand-alone mode (single), set the motherboard switches as follows: SW2 = 1 and SW3 = 1. Figure 1 shows a typical configuration in stand-alone mode. Figure 1. Stand-Alone Connections Daisy-Chain Operation The Si3000 supports an additional serial mode which places the device in a slave mode. This serial mode is accomplished by M1 = VD and M0 = GND. The Si3000SSI-EVB can essentially be used in two modes: stand-alone (single) and slave. Table 2 shows the configurations necessary for each mode. In addition to JP1 and JP2 (which control the serial mode of the local Si3000), SW2 and SW3 are used to route the digital signals to ensure proper connection. The SI3000SSI-EVB can be connected as a slave through JP6. Figure 2 shows the connection of a Si3034SSI-EVB as a master in daisy-chain mode. See the Si3034SSI-EVB data sheet for more details. Figure 2. Daisy-Chain Connections The DSP or ASIC target system connects directly to the master board. Only the master board needs a connection to a power supply. VD is routed through JP5 and JP6. When the Si3000SSI-EVB is used as a slave board, the serial mode must be M1 = VD and M0 = GND. Be sure to configure SW2 and SW3 appropriately according to Table 2. Line Connection The Si3000SSI-EVB has two physical interfaces designed to connect to the phone line. One of the connectors is on the motherboard (Figure 8), J1 pins 3 To DSP Phone Line Power Supply OSC VA VD Y1 JP5 JP6 JP3 JP4 RJ11 M1 M0 SW2 SW3 12 21 Table 2: Si3000SSI-EVB Modes Configuration SW2 SW3 M1 M0 Single 1 1 GND X Slave 2 2 VD GND To DSP Power Supply OSC VA VD Y1 JP5 JP6 JP3 JP4 RJ11 M1 M0 SW2 SW3 12 21 JP5 JP6 JP4 M1 M0 SW2 SW3 12 21 Master Board Slave Board To Modem Hdst Select RJ11 RJ11 Speaker Mic Line In Line Out RJ11 |
Numéro de pièce similaire - SI3000SSI-EVB |
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Description similaire - SI3000SSI-EVB |
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