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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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CS4952-CL Fiches technique(PDF) 7 Page - Cirrus Logic |
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CS4952-CL Fiches technique(HTML) 7 Page - Cirrus Logic |
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7 / 44 page  CS4952/53 DS223PP2 7 A.C. CHARACTERISTICS: Tch Tcl Tisu Tih Toa CLK V[7:0] HSYNC*/VSYNC* (Inputs) HSYNC*/VSYNC*/ CB/FIELD/INT (Outputs) Figure 1. Video Pixel Data and Control Port Timing Parameter Symbol Min Typ Max Units Pixel Input and Control Port Clock Pulse High Time Tch 14.82 18.52 22.58 ns Clock Pulse Low Time Tcl 14.82 18.52 22.58 ns Clock to Data Set-up Time Tisu 6- - ns Clock to Data Hold Time Tih 0- - ns Clock to Data Output Delay Toa -- 17 ns Parameter Symbol Min Typ Max Units I2C Host Port Timing SCL Frequency Fclk 100 1000 KHz Clock Pulse High Time Tsph 0.1 µs Clock Pulse Low Time Tspl 0.7 µs Hold Time (Start Condition) Tsh 100 ns Setup Time (Start Condition) Tssu 100 ns Data Setup Time Tsds 50 ns Rise Time Tsr 1µs Fall Time Tsf 0.3 µs Setup Time (Stop Condition) Tss 100 ns Bus Free Time Tbuf 100 ns Data Hold Time Tdh 0ns SCL Low to Data Out Valid Tvdo 600 ns Figure 2. I2C Host Port Timing SDA SCL Tsh Tsr Tspl Tsf Tssu Tsph Tsds Tsh Tss Tbuf Tvdo Tdh |
Numéro de pièce similaire - CS4952-CL |
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Description similaire - CS4952-CL |
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