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CS4294-KQ Fiches technique(PDF) 11 Page - Cirrus Logic

No de pièce CS4294-KQ
Description  SoundFusion Audio/Docking Codec 97 (AMC 97)
Download  42 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4294-KQ Fiches technique(HTML) 11 Page - Cirrus Logic

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CS4294
DS326PP4
11
the next falling edge of the BIT_CLK clock signal.
The Controller is also responsible for issuing reset
via the RESET# signal. After being reset, the Co-
dec is responsible for flagging the Controller that it
is ready for operation after synchronizing its inter-
nal functions. The AC-link signals may be refer-
enced to either 5 Volts or 3.3 Volts. The CS4294
must use the same digital supply voltage as the
Controller chip.
3.2
Control registers
All read accesses to the Codec are generated by re-
questing a register address (index number) in slot 1
of
a
SDATA_OUT
frame.
The
following
SDATA_IN frame will contain the register content
in its slot 2. The write operation is identical with the
index in slot 1 and the write data in slot 2. The
AC ‘97 Frame Definition section details the func-
tion of each input and output frame. Individual reg-
ister descriptions are found in the Register
Interface section.
AC-97 Register Interface
The CS4294 implements the AC ’97 Registers in
accordance with the AC ’97 2.0 Specification. See
the Register Interface section for details on the
CS4294’s register set.
4. ANALOG SECTION
Please refer to Figure 8, Mixer diagram, for a high-
level graphical representation of the CS4294 ana-
log mixer structure.
CODEC
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET#
Digital AC’97
Controller
Figure 7. AC-link Connections
Figure 8. Mixer Diagram
VOL
MUTE
MUTE
MUTE
MUTE
VOL
VOL
VOL
+20dB
DAC
3D
STEREO TO
MONO MIXER
VOL
VOL
OUTPUT
BUFFER
OUTPUT
BUFFER
MASTER VOLUME
ALTERNATE VOLUME
MAIN D/A
CONVERTERS
PCM_OUT
PCM OUT
PATH
STEREO
INPUT
MIXER
STEREO
OUTPUT
MIXER
Σ
Σ
Σ
MIC1
AUX
CD
LINE
Mode Control
SYNC
SDATA_OUT
MUTE
VOL
ADC
INPUT
MUX
VOL
MUTE
ADC
MAIN ADC GAIN
ADC
DAC
RESET#
ALT_LINE_OUT
LINE_OUT
GPIO
BIT_CLK
SDATA_IN
AC-Link Interface
2
/
2
/
2
/
2
/
2
/
2
/
2
/
6
/
3
/
2
/


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