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CS8129YTHA5 Fiches technique(PDF) 2 Page - Cherry Semiconductor Corporation |
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CS8129YTHA5 Fiches technique(HTML) 2 Page - Cherry Semiconductor Corporation |
2 / 8 page * To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable. Delay Time = = CDelay x 3.5 x 105 (typ) Note 1: assuming ideal capacitor CDelay x VDelay Threshold Charge I Charge Electrical Characteristics: -40ûC ² TA ² + 125ûC, -40ûC ² TJ ² +150ûC, 6V ² VIN ² 26V, 5mA ² IOUT ² 500mA, R = 4.7k½ to VOUT unless otherwise noted* RESET PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Absolute Maximum Ratings Input Operating Range..................................................................................................................................................-0.5 to 26V Power Dissipation.............................................................................................................................................Internally Limited Peak Transient Voltage (46V Load Dump @ 14V VIN) ...............................................................................................-50V, 60V Output Current .................................................................................................................................................Internally Limited ESD Susceptibility (Human Body Model)..............................................................................................................................4kV Junction Temperature .............................................................................................................................................-55¡C to 150¡C Storage Temperature...............................................................................................................................................-55¡C to 150¡C Lead Temperature Soldering Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak 2 s Output Stage (VOUT) Output Voltage 4.85 5.00 5.15 V Dropout Voltage IOUT = 500mA 0.35 0.60 V Supply Current IOUT ² 10mA 2 7 mA IOUT ² 100mA 6 12 IOUT ² 500mA 55 100 Line Regulation 6V ² VIN ² 26V, IOUT = 50mA 5 50 mV Load Regulation 50mA ² IOUT ² 500mA, VIN = 14V 10 50 mV Ripple Rejection f = 120Hz, VIN = 7 to 17V, 54 75 dB IOUT = 250mA Current Limit 0.75 1.20 A Overvoltage Shutdown 32 40 V Reverse Polarity Input VOUT ³ -0.6V, 10½ Load -15 -30 V Voltage DC Thermal Shutdown Guaranteed by Design 150 180 210 ¡C s and Delay Functions Delay Charge Current VDELAY = 2V 5 10 15 µA Threshold VOUT Increasing, VRT(ON) 4.05 4.35 4.50 V VOUT Decreasing, VRT(OFF) 4.00 4.20 4.45 V Hysteresis VRH=VRT(ON) - VRT(OFF) 50 150 250 mV Delay Threshold Charge, VDC(HI) 3.25 3.50 3.75 V Discharge, VDC(LO) 2.85 3.10 3.35 V Delay Hysteresis 200 400 800 mV Output Voltage Low1V < VOUT < VRT(L) , 3k½ to VOUT 0.1 0.4 V Output Leakage VOUT > VRT(H) 010 µA Current Delay Capacitor Discharge Latched ÒONÓ, 0.2 0.5 V Discharge Voltage VOUT > VRT Delay Time CDELAY = 0.1µF (Note 1) 16 32 48 ms RESET RESET RESET RESET RESET |
Numéro de pièce similaire - CS8129YTHA5 |
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Description similaire - CS8129YTHA5 |
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