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L6747ATR Fiches technique(PDF) 4 Page - STMicroelectronics |
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L6747ATR Fiches technique(HTML) 4 Page - STMicroelectronics |
4 / 15 page Pin information and thermal data L6747A 4/15 Doc ID 17126 Rev 1 2 Pin information and thermal data 2.1 Pin information Figure 3. Pin connection diagram (top view) Table 2. Pin descriptions Pin # Name Function 1BOOT High-side driver supply. This pin supplies the high-side floating driver. Connect through a RBOOT - CBOOT (2.2Ω - 220nF typ.) network to the PHASE pin. Internally connected to the cathode of the integrated bootstrap diode. See Section 4.3 for guidance in selecting the capacitor value. 2PWM Control input for the driver; 5V compatible, internally clamp to 3.3V. This pin controls the state of the driver and which external MOSFET must be turned ON according to EN status. It manages the high-impedance (HiZ) state which sets all the MOSFETs to OFF if externally set in the HiZ window (see Table 5). See Section 4.1 for details of HiZ. 3EN Enable input for the driver; 5V compatible, internally clamp to 3.3V. Pull high to enable the driver based on the PWM status. Pull low to enter HiZ state with all MOSFETs OFF, regardless of the PWM status. See Section 4.1 for details of HiZ. 4VCC Device and LS driver power supply. Connect to any voltage between 5V and 12V. Bypass with low-ESR MLCC capacitor to GND (1µF typ). 5LGATE Low-side driver output. Connect directly to the low-side MOSFET gate. A small series resistor may be used to reduce dissipated power, especially in high frequency applications. 6GND All internal references, logic and drivers are referenced to this pin. Connect to the PCB ground plane. 7 PHASE High-side driver return path. Connect to the high-side MOSFET source. This pin is also monitored for adaptive dead-time management and pre-OV protection. Internal clamp circuitry prevents leakage from this pin in disable conditions. 1 2 3 4 LGATE GND PHASE UGATE VCC EN PWM BOOT 5 6 7 8 |
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