REV. B

–8–

ADM660/ADM8660

Table II. ADM8660 Charge-Pump Frequency Selection

FC

OSC

Charge Pump

C1, C2

GND

Open

25 kHz

10

µF

V+

Open

120 kHz

2.2

µF

GND or V+

Ext Cap

See Typical Characteristics

GND

Ext CLK

Ext CLK Frequency/2

+

+

+1.5V TO +7V

INPUT

C1

C2

INVERTED

NEGATIVE

OUTPUT

ADM660

ADM8660

FC

CAP+

GND

CAP–

V+

OSC

LV

OUT

CLK OSC

CMOS GATE

Figure 7. ADM660/ADM8660 External Oscillator

Voltage Doubling Configuration

Figure 8 shows the ADM660 configured to generate increased

output voltages. As in the inverting mode, only two external

capacitors are required. The doubling function is achieved by

reversing some connections to the device. The input voltage is

applied to the GND pin and V+ is used as the output. Input

voltages from 2.5 V to 7 V are allowable. In this configuration,

pins LV, OUT must be connected to GND.

Output resistance and ripple are similar to the voltage inverting

configuration.

Note that the ADM8660 cannot be used in the voltage

doubling configuration.

+

10 F

DOUBLED

POSITIVE

OUTPUT

ADM660

FC

CAP+

GND

CAP–

V+

OSC

LV

OUT

10 F

+2.5V

TO +7V

INPUT

Figure 8. Voltage Doubler Configuration

Shutdown Input

The ADM8660 contains a shutdown input that can be used to

disable the device and thus reduce the power consumption. A

logic high level on the SD input shuts the device down reducing

the quiescent current to 0.3

µA. During shutdown, the output

voltage goes to 0 V. Therefore, ground referenced loads are not

powered during this state. When exiting shutdown, it takes

several cycles (approximately 500

µs) for the charge pump to

reach its final value. If the shutdown function is not being used,

then SD should be hardwired to GND.

Capacitor Selection

The optimum capacitor value selection depends the charge-pump

frequency. With 25 kHz selected, 10

µF capacitors are recommended,

while with 120 kHz selected, 2.2

µF capacitors may be used.

Other frequencies allow other capacitor values to be used. For

maximum efficiency in all cases, it is recommended that capaci-

tors with low ESR are used for the charge-pump. Low ESR

capacitors give both the lowest output resistance and lowest

ripple voltage. High output resistance degrades the overall power

efficiency and causes voltage drops, especially at high output

Inverting Negative Voltage Generator

Figures 5 and 6 show the ADM660/ADM8660 configured to

generate a negative output voltage. Input supply voltages from

1.5 V up to 7 V are allowable. For supply voltage less than 3 V,

LV must be connected to GND. This bypasses the internal

regulator circuitry and gives best performance in low voltage

applications. With supply voltages greater than 3 V, LV may

be either connected to GND or left open. Leaving it open facili-

tates direct substitution for the ICL7660.

+

+

+1.5V TO +7V

INPUT

C1

10 F

C2

10 F

INVERTED

NEGATIVE

OUTPUT

ADM660

FC

CAP+

GND

CAP–

V+

OSC

LV

OUT

Figure 5. ADM660 Voltage Inverter Configuration

+

+

+1.5V TO +7V

INPUT

C1

10 F

C2

10 F

INVERTED

NEGATIVE

OUTPUT

ADM8660

FC

CAP+

GND

CAP–

V+

LV

OUT

SD

SHUTDOWN

CONTROL

Figure 6. ADM8660 Voltage Inverter Configuration

OSCILLATOR FREQUENCY

The internal charge-pump frequency may be selected to be

either 25 kHz or 120 kHz using the Frequency Control (FC)

input. With FC unconnected (ADM660) or connected to GND

(ADM8660), the internal charge pump runs at 25 kHz while, if

FC is connected to V+, the frequency is increased by a factor of

five. Increasing the frequency allows smaller capacitors to be

used for equivalent performance or, if the capacitor size is un-

changed, it results in lower output impedance and ripple.

If a charge-pump frequency other than the two fixed values is

desired, this is made possible by the OSC input, which can

either have a capacitor connected to it or be overdriven by an

external clock. Refer to the Typical Performance Characteris-

tics, which shows the variation in charge-pump frequency versus

capacitor size. The charge-pump frequency is one-half the oscil-

lator frequency applied to the OSC pin.

If an external clock is used to overdrive the oscillator, its levels

should swing to within 100 mV of V+ and GND. A CMOS

driver is, therefore, suitable. When OSC is overdriven, FC has

no effect but LV must be grounded.

Note that overdriving is permitted only in the voltage inverter

configuration.

Table I. ADM660 Charge-Pump Frequency Selection

FC

OSC

Charge Pump

C1, C2

Open

Open

25 kHz

10

µF

V+

Open

120 kHz

2.2

µF

Open or V+

Ext Cap

See Typical Characteristics

Open

Ext CLK

Ext CLK Frequency/2