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AD652 Fiches technique(PDF) 3 Page - Analog Devices

No de pièce AD652
Description  Monolithic Synchronous Voltage-to-Frequency Converter
Download  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD652 Fiches technique(HTML) 3 Page - Analog Devices

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AD652
Rev. C | Page 3 of 28
SPECIFICATIONS
Typical @ TA = 25°C, VS = ±15 V, unless otherwise noted. Specifications in boldface are 100% tested at final test and are used to measure
outgoing quality levels.
Table 1.
AD652JP/AQ/SQ
AD652KP/BQ
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
VOLTAGE-TO-FREQUENCY MODE
Gain Error
fCLOCK= 200 kHz
±0.5
±1
±0.25
±0.5
%
fCLOCK = 1 MHz
±0.5
±1
±0.25
±0.5
%
fCLOCK = 4 MHz
±0.5
±1.5
±0.25
±0.75
%
Gain Temperature Coefficient
fCLOCK = 200 kHz
±25
±50
±15
±25
ppm/°C
fCLOCK = 1 MHz
±25
±50
±15
±25
ppm/°C
±10
±50
±10
±30
ppm/°C1
fCLOCK = 4 MHz
±25
±75
±15
±50
ppm/°C
Power Supply Rejection Ratio
0.001
0.01
0.001
0.01
%/V
Linearity Error
fCLOCK = 200 kHz
±0.002
±0.02
±0.002
±0.005
%
fCLOCK = 1 MHz
±0.002
±0.02
±0.002
±0.005
%
fCLOCK = 2 MHz
±0.01
±0.02
±0.002
±0.005
%
fCLOCK = 4 MHz
±0.02
±0.05
±0.01
±0.02
%
Offset (Transfer Function, RTI)
± 1
±3
±1
±2
mV
Offset Temperature Coefficient
±10
±50
±10
±25
µV/°C
Response Time
One Period of New Output Frequency Plus One Clock Period.
FREQUENCY-TO-VOLTAGE MODE
Gain Error, fIN = 100 kHz FS
±0.5
±1
±0.25
±0.5
%
Linearity Error, fIN = 100 kHz FS
±0.002
±0.02
±0.002
±0.01
%
INPUT RESISTORS
CERDIP (Figure 2)(0 to 10 V FS Range)
19.8
20
20.2
19.8
20
20.2
kΩ
PLCC (Figure 3)
Pin 8 to Pin 7
9.9
10
10.1
9.9
10
10.1
kΩ
Pin 7 to Pin 5 (0 V to 5 V FS Range)
9.9
10
10.1
9.9
10
10.1
kΩ
Pin 8 to Pin 5 (0 V to 10 V FS Range)
19.8
20
20.2
19.8
20
20.2
kΩ
Pin 9 to Pin 5 (0 V to 8 V FS Range)
15.8
16
16.2
15.8
16
16.2
kΩ
Pin 10 to Pin 5 (Auxiliary Input)
19.8
20
20.2
19.8
20
20.2
kΩ
Temperature Coefficient (All)
±50
±100
±50
±100
ppm/°C
INTEGRATOR OP AMP
Input Bias Current
Inverting Input (Pin 5)
±5
±20
±5
±20
nA
Noninverting Input (Pin 6)
20
50
20
50
nA
Input Offset Current
20
70
20
70
nA
Input Offset Current Drift
1
3
1
2
nA/°C
Input Offset Voltage
±1
±3
±1
±2
mV
Input Offset Voltage Drift
±10
±25
±10
±15
µV/°C
Open-Loop Gain
86
86
dB
Common-Mode Input Range
–VS + 5
+VS – 5
–VS + 5
+VS – 5
V
CMRR
80
80
dB
Bandwidth
14
95
14
95
MHz
Output Voltage Range
−1
(+VS − 4)
−1
(+VS − 4)
V
(Referred to Pin 6, R1 > = 5 kΩ)


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