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SN54LS109A Fiches technique(PDF) 2 Page - Motorola, Inc

No de pièce SN54LS109A
Description  DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
Download  4 Pages
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Fabricant  MOTOROLA [Motorola, Inc]
Site Internet  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

SN54LS109A Fiches technique(HTML) 2 Page - Motorola, Inc

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FAST AND LS TTL DATA
SN54/74LS109A
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
– 55
0
25
25
125
70
°C
IOH
Output Current — High
54, 74
– 0.4
mA
IOL
Output Current — Low
54
74
4.0
8.0
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
Input Clamp Diode Voltage
– 0.65
– 1.5
V
VCC = MIN, IIN = – 18 mA
VOH
Output HIGH Voltage
54
2.5
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
54
2.5
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
54, 74
0.25
0.4
V
IOL = 4.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
74
0.35
0.5
V
IOL = 8.0 mA
VIN = VIL or VIH
per Truth Table
IIH
Input HIGH Current
J, K, Clock
Set, Clear
20
40
µA
VCC = MAX, VIN = 2.7 V
IIH
J, K, Clock
Set, Clear
0.1
0.2
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
J, K, Clock
Set, Clear
– 0.4
– 0.8
mA
VCC = MAX, VIN = 0.4 V
IOS
Output Short Circuit Current (Note 1)
– 20
– 100
mA
VCC = MAX
ICC
Power Supply Current
8.0
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
fMAX
Maximum Clock Frequency
25
33
MHz
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Clock, Clear, Set to Output
13
25
ns
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Clock, Clear, Set to Output
25
40
ns
CL = 15 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tW
Clock High Clear, Set Pulse Width
25
ns
VCC = 5.0 V
ts
Data Setup Time — HIGH
Data Setup Time — LOW
20
ns
VCC = 5.0 V
ts
Data Setup Time — HIGH
Data Setup Time — LOW
20
ns
VCC = 5.0 V
th
Hold time
5.0
ns


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Numéro de composants électroniques

No de pièceDescriptionHtml ViewFabricant
DV74ACT109 Dual JK Positive Edge-triggered Flip-Flop 1  2  3  4  5  AVG Semiconductors(HITEK)
54AC109 Dual JK Positive Edge-Triggered Flip-Flop 1  2  3  4  5  More National Semiconductor (TI)
74F74 Dual D-Type Positive Edge-Triggered Flip-Flop 1  2  3  4  5  More Fairchild Semiconductor
74ALS109A Dual J-K positive edge-triggered flip-flop with set and reset 1  2  3  4  5  More NXP Semiconductors
74AC74 Dual D-Type Positive Edge-Triggered Flip-Flop 1  2  3  4  5  More Fairchild Semiconductor
MC74AC74 DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP 1  2  3  4  5  More Motorola, Inc
MC74AC109 Dual JK Positive Edge−Triggered Flip−Flop 1  2  3  4  5  More ON Semiconductor
74ACTQ74 Quiet Series Dual D-Type Positive Edge-Triggered Flip-Flop 1  2  3  4  5  More Fairchild Semiconductor
74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs 1  2  3  4  5  More Fairchild Semiconductor
74LVQ74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop 1  2  3  4  5  More Fairchild Semiconductor

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