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74AHCT02D Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74AHCT02D Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 14 page 74AHC_AHCT02_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 21 May 2008 2 of 14 NXP Semiconductors 74AHC02; 74AHCT02 Quad 2-input NOR gate 4. Functional diagram 74AHCT02 74AHCT02D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHCT02PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74AHCT02BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 Table 1. Ordering information …continued Type number Package Temperature range Name Description Version Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) mna216 1A 1B 1Y 3 2 1 2A 2B 2Y 6 5 4 3A 3B 3Y 9 8 10 4A 4B 4Y 12 11 13 001aah084 2 1 3 5 4 ≥1 6 ≥1 8 10 ≥1 9 11 13 ≥1 12 mna215 A B Y |
Numéro de pièce similaire - 74AHCT02D |
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Description similaire - 74AHCT02D |
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