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74LVT125PW Fiches technique(PDF) 7 Page - NXP Semiconductors

No de pièce 74LVT125PW
Description  3.3 V quad buffer 3-state
Download  16 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVT125PW Fiches technique(HTML) 7 Page - NXP Semiconductors

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74LVT_LVTH125_6
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 06 — 6 March 2006
7 of 16
Philips Semiconductors
74LVT125; 74LVTH125
3.3 V quad buffer; 3-state
[1]
Typical values are measured at VCC = 3.3 V and Tamb =25 °C.
[2]
Unused pins at VCC or GND.
[3]
This is the bus hold overdrive current required to force the input to the opposite logic state.
[4]
This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.0 V to
3.6 V a transition time of 100
µs is permitted. This parameter is valid for Tamb =25 °C only.
[5]
ICC is measured with outputs pulled to VCC or GND.
[6]
This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
11. Dynamic characteristics
[1]
Typical values are at VCC = 3.3 V and Tamb =25 °C.
∆I
CC
additional quiescent supply
current
per input pin; VCC = 3 V to 3.6 V;
one input at VCC − 0.6 V and
other inputs at VCC or GND
[6] -
0.1
0.2
mA
Ci
input capacitance
VI = 0 V or 3.0 V
-
4
-
pF
Co
output capacitance
outputs disabled;
VO = 0 V or 3.0 V
-8
-pF
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C[1]
tPLH
LOW-to-HIGH propagation delay nAn to nY
see Figure 6
VCC = 2.7 V
-
-
4.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.7
4.0
ns
tPHL
HIGH-to-LOW propagation delay nAn to nY see Figure 6
VCC = 2.7 V
-
-
4.9
ns
VCC = 3.0 V to 3.6 V
1.0
2.9
3.9
ns
tPZH
output enable time nOE to nY
see Figure 7
VCC = 2.7 V
-
-
6.0
ns
VCC = 3.0 V to 3.6 V
1.0
3.4
4.7
ns
tPZL
output enable time nOE to nY
see Figure 7
VCC = 2.7 V
-
-
6.5
ns
VCC = 3.0 V to 3.6 V
1.1
3.4
4.7
ns
tPHZ
output disable time nOE to nY
see Figure 7
VCC = 2.7 V
-
-
5.7
ns
VCC = 3.0 V to 3.6 V
1.8
3.7
5.1
ns
tPLZ
output disable time nOE to nY
see Figure 7
VCC = 2.7 V
-
-
4.0
ns
VCC = 3.0 V to 3.6 V
1.3
2.6
4.5
ns


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