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AM29LV008BB-80EI Fiches technique(PDF) 1 Page - Advanced Micro Devices |
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AM29LV008BB-80EI Fiches technique(HTML) 1 Page - Advanced Micro Devices |
1 / 38 page PRELIMINARY This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. Publication# 21524 Rev: B Amendment/+1 Issue Date: March 1998 Refer to AMD’s Website (www.amd.com) for the latest information. Am29LV008B 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS s Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors s Manufactured on 0.35 µm process technology — Compatible with 0.5 µm Am29LV008 device s High performance — Full voltage range: access times as fast as 80 ns — Regulated voltage range: access times as fast as 70 ns s Ultra low power consumption (typical values at 5 MHz) — 200 nA Automatic Sleep mode current — 200 nA standby mode current — 7 mA read current — 15 mA program/erase current s Flexible sector architecture — One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors — Supports full chip erase — Sector Protection features: A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors s Unlock Bypass Program Command — Reduces overall programming time when issuing multiple program command sequences s Top or bottom boot block configurations available s Embedded Algorithms — Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors — Embedded Program algorithm automatically writes and verifies data at specified addresses s Minimum 1,000,000 write cycle guarantee per sector s Package option — 40-pin TSOP s Compatibility with JEDEC standards — Pinout and software compatible with single- power supply Flash — Superior inadvertent write protection s Data# Polling and toggle bits — Provides a software method of detecting program or erase operation completion s Ready/Busy# pin (RY/BY#) — Provides a hardware method of detecting program or erase cycle completion s Erase Suspend/Erase Resume — Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation s Hardware reset pin (RESET#) — Hardware method to reset the device to reading array data |
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