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ADP1607 Fiches technique(PDF) 11 Page - Analog Devices

No de pièce ADP1607
Description  2 MHz, Synchronous Boost DC-to-DC Converter
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADP1607 Fiches technique(HTML) 11 Page - Analog Devices

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Data Sheet
ADP1607
Rev. C | Page 11 of 16
operates in PFM mode for light load currents and switches to
PWM mode for medium and heavy load currents.
Pulse Frequency Modulation (PFM)
When the auto mode version of the ADP1607 is operating
under light load conditions, the effective switching frequency
and supply current are decreased and varied using PFM to
regulate the output voltage. This results in improved efficiencies
and lower quiescent currents. In PFM mode, the converter only
switches when necessary to keep the output voltage between the
PFM comparator high output voltage threshold and the lower
sleep mode exit voltage threshold. Switching stops when the
upper PFM limit is reached and resumes when the lower sleep
mode exit threshold is reached.
When VOUT exceeds the upper PFM threshold, switching stops
and the part enters sleep mode. In sleep mode, the ADP1607 is
mostly shut down, significantly reducing the quiescent current.
The output voltage is then discharged by the load until the
output voltage reaches the lower sleep mode exit threshold.
After crossing the lower sleep mode exit threshold, switching
resumes and the process repeats.
Mode Transition
The auto mode version of the ADP1607 switches automatically
between PFM and PWM modes to maintain optimal efficiency.
Switching to PFM allows the converter to save power by sup-
plying the lighter load current with fewer switching cycles. The
mode transition point depends on the operating conditions.
See Figure 14 for typical transition levels for VOUT = 2.5 V.
Hysteresis exists in the transition point to prevent instability
and decreased efficiencies that may result if the converter
oscillates between PFM and PWM for a fixed input voltage and
load current.
The output voltage in PWM can be above or below the PFM
voltage of that part.
INTERNAL CONTROL FEATURES
Input to Output Isolation
While in shutdown, the ADP1607 manages the voltage of the
bulk of the PMOS to force it off and internally isolate the path
from the input to output. This allows the output to drop to
ground, reducing the current consumption of the application
in shutdown.
Soft Start
The ADP1607 soft start sequence is designed for optimal
control of the part. When EN goes high, or when the part
recovers from a TSD, the start-up sequence begins. The output
voltage increases through a sequence of stages to ensure that
the internal circuitry is powered up in the correct order as the
output voltage rises to its final value.
Current Limit
The ADP1607 is designed with a fixed 1 A typical current limit
that does not vary with duty cycle.
Synchronous Rectification
In addition to the N-channel MOSFET switch, the ADP1607
has a P-channel MOSFET switch to build the synchronous
rectifier. The synchronous rectifier improves efficiency,
especially for heavy load currents, and reduces cost and board
space by eliminating the need for an external Schottky diode.
Compensation
The PWM control loop of the ADP1607 is internally compen-
sated to deliver maximum performance with no additional
external components. The ADP1607 is designed to work with
2.2 μH chip inductors and 10 μF ceramic capacitors. Other
values may reduce performance and/or stability.
Thermal Shutdown (TSD) Protection
The ADP1607 includes thermal shutdown (TSD) protection
when the part is in PWM mode only. If the die temperature
exceeds 150°C (typical), the TSD protection activates and turns
off the power devices. They remain off until the die temperature
falls below 135°C (typical), at which point the converter
restarts.


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