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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TC7106CKW713 Fiches technique(PDF) 8 Page - Microchip Technology |
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TC7106CKW713 Fiches technique(HTML) 8 Page - Microchip Technology |
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8 / 34 page  TC7106/A/TC7107/A DS21455D-page 8 © 2008 Microchip Technology Inc. 3.0 DETAILED DESCRIPTION (All Pin designations refer to 40-Pin PDIP.) 3.1 Dual Slope Conversion Principles The TC7106A and TC7107A are dual slope, integrating Analog-to-Digital Converters. An understanding of the dual slope conversion technique will aid in following the detailed operation theory. The conventional dual slope converter measurement cycle has two distinct phases: • Input Signal Integration • Reference Voltage Integration (De-integration) The input signal being converted is integrated for a fixed time period (TSI). Time is measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (TRI). See Figure 3-1. FIGURE 3-1: Basic Dual Slope Converter. In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” and “ramp-down.” A simple mathematical equation relates the input signal, reference voltage and integration time. EQUATION 3-1: For a constant VIN: EQUATION 3-2: The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values as long as they are stable during a measurement cycle. An inherent benefit is noise immunity. Noise spikes are integrated or averaged to zero during the integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated. Integrating ADCs commonly operate with the signal integration period set to a multiple of the 50/60Hz power line period (see Figure 3-2). FIGURE 3-2: Normal Mode Rejection of Dual Slope Converter. + – REF Voltage Analog Input Signal + – DISPLAY Switch Driver Control Logic Counter Polarity Control Phase Control VIN µ VREF VIN µ1/2 VREF Variable Reference Integrate Time Fixed Signal Integrate Time Integrator C Comparator +/– Where: VR = Reference voltage TSI = Signal integration time (fixed) TRI = Reference voltage integration time (variable). 1 RC -------- V IN 0 T SI ∫ t ()dt V RTRI RC --------------- = VIN = VR TRI TSI 30 20 10 0 0.1/T 1/T 10/T Input Frequency T = Measured Period Where: FOSC = Clock Frequency at Pin 38 VFS = Full Scale Input Voltage RINT = Integrating Resistor VINT = Desired Full Scale Integrator Output Swing C INT 4000 () 1 F OSC ------------- ⎝⎠ ⎛⎞ VFS R INT ----------- ⎝⎠ ⎛⎞ V INT ------------------------------------------------------ = |
Numéro de pièce similaire - TC7106CKW713 |
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Description similaire - TC7106CKW713 |
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