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AD5160BRJZ50-RL72 Fiches technique(PDF) 5 Page - Analog Devices

No de pièce AD5160BRJZ50-RL72
Description  256-Position SPI-Compatible Digital Potentiometer
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5160BRJZ50-RL72 Fiches technique(HTML) 5 Page - Analog Devices

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AD5160
Rev. B | Page 5 of 16
TIMING CHARACTERISTICS—ALL VERSIONS
VDD = +5V ± 10%, or +3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.
Table 3.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
SPI INTERFACE TIMING CHARACTERISTICS1, 2
Specifications apply to all parts
Clock Frequency
fCLK
25
MHz
Input Clock Pulse Width
tCH, tCL
Clock level high or low
20
ns
Data Setup Time
tDS
5
ns
Data Hold Time
tDH
5
ns
CS Setup Time
tCSS
15
ns
CS High Pulse Width
tCSW
40
ns
CLK Fall to CS Fall Hold Time
tCSH0
0
ns
CLK Fall to CS Rise Hold Time
tCSH1
0
ns
1 See the timing diagram, Figure 38, for location of measured values. All input control voltages are specified with tR = tF = 2 ns (10% to 90% of 3 V) and timed from a
voltage level of 1.5 V.
2 Guaranteed by design and not subject to production test.


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