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TPS65642A Fiches technique(PDF) 9 Page - Texas Instruments |
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TPS65642A Fiches technique(HTML) 9 Page - Texas Instruments |
9 / 77 page TPS65642A www.ti.com SLVSC21 – OCTOBER 2013 Table 3-1. PIN DESCRIPTIONS (continued) PIN I/O DESCRIPTION NAME NO. OUTI C4 O Gamma correction OUTE C5 O Gamma correction OUTA C6 O Gamma correction RSET C7 O Reference current-setting resistor connection RE D1 O Gate voltage shaping discharge resistor connection SDA D2 I/O I2C serial data OUTM D3 O Gamma correction OUTJ D4 O Gamma correction OUTF D5 O Gamma correction OUTB D6 O Gamma correction POS1 D7 I VCOM 1 non-inverting input VGHM E1 O Gate voltage shaping output SCL E2 I/O I2C serial clock OUTN E3 O Gamma correction OUTK E4 O Gamma correction OUTG E5 O Gamma correction OUTC E6 O Gamma correction POS2 E7 I VCOM2 non-inverting input. Boost converter 2 (VGH) output sense. (Internally connected as supply voltage for the gate VGH F1 I voltage shaping.) COMP F2 O Boost converter 1 (AVDD) compensation network connection WP F3 I EEPROM write protect AVDD F4 I VCOM1 and VCOM2 supply voltage OUTH F5 O Gamma correction OUTD F6 O Gamma correction NEG1 F7 I VCOM1 inverting input GND G1 P Ground. EN G2 I Boost converter 1 (AVDD) enable GND G3 P Ground. SW1 G4 O Boost converter 1 (AVDD) switch pin AVDD G5 O Boost converter 1 (AVDD) rectifier output OUT1 G6 O VCOM1 output GND G7 P Ground. SW4 H1 O Boost converter 2 (VGH) switch pin GND H2 P Ground GND H3 P Ground SW1 H4 O Boost converter 1 (AVDD) switch pin AVDD H5 O Boost converter 1 (AVDD) rectifier output OUT2 H6 O VCOM2 output NEG2 H7 I VCOM2 inverting input Copyright © 2013, Texas Instruments Incorporated Terminal Description 9 Submit Documentation Feedback Product Folder Links: TPS65642A |
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