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MC14060BFELG Fiches technique(PDF) 2 Page - ON Semiconductor |
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MC14060BFELG Fiches technique(HTML) 2 Page - ON Semiconductor |
2 / 9 page MC14060B http://onsemi.com 2 Figure 1. Pin Assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 RESET Q9 Q8 Q10 VDD OUT 2 OUT 1 CLOCK Q6 Q13 Q12 VSS Q4 Q7 Q5 Q14 Table 1. Truth Table Clock Reset Output State H L L H No Change Advance to Next State All Outputs are Low X = Don’t Care Figure 2. Logic Diagram OUT 2 OUT 1 CLOCK RESET 12 11 10 9 Q4 Q5 Q12 Q13 Q14 5 71 2 3 CQ R CQ CQ R CQ CQ R CQ CQ R CQ CQ R CQ CQ R CQ Q6 = PIN 4 Q7 = PIN 6 Q8 = PIN 14 Q9 = PIN 13 Q10 = PIN 15 VDD = PIN 16 VSS = PIN 8 ORDERING INFORMATION Device Package Shipping† MC14060BCPG PDIP−16 (Pb−Free) 500 Units / Rail MC14060BDG SOIC−16 (Pb−Free) 48 Units / Rail MC14060BDR2G SOIC−16 (Pb−Free) 2500 / Tape & Reel MC14060BDTR2G TSSOP−16* 2500 / Tape & Reel MC14060BFELG SOEIAJ−16 (Pb−Free) 2000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. |
Numéro de pièce similaire - MC14060BFELG |
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Description similaire - MC14060BFELG |
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