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MC34932EK Fiches technique(PDF) 4 Page - Freescale Semiconductor, Inc

No de pièce MC34932EK
Description  Dual 5.0 A H-Bridge
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Fabricant  FREESCALE [Freescale Semiconductor, Inc]
Site Internet  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC34932EK Fiches technique(HTML) 4 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
4
Freescale Semiconductor
34932
PIN CONNECTIONS
15, 16, 39,
40
PGNDB
Power
Ground
Power Ground
High-current power ground pins must be connected together physically as close
as possible and directly soldered down to a wide, thick, low resistance ground
plane on the PCB. PGNDB should be connected to PGNDA with a low-
impedance path.
17, 18
OUT4
Power
Output
H-Bridge Output 4
H-Bridge B Source of HS2 and drain of LS2.
19, 26, 28,
36
VPWRB
Power Input
Positive Power
Supply
These pins must be connected together physically as close as possible and
directly soldered down to a wide, thick, low resistance supply plane on the PCB.
20
CCPB
Analog
Output
Charge Pump
Capacitor
External reservoir capacitor connection for H-Bridge B internal charge pump;
connected to VPWRB. Allowable values are 30 to 100 nF. Note: This capacitor
is required for the proper performance of the device.
23
IN4
Logic Input
Input 4
Logic input control of OUT4.
24
IN3
Logic Input
Input 3
Logic input control of OUT3.
25
SFB
Logic
Output -
Open Drain
Status Flag B
(Active Low)
H-Bridge B open drain active LOW Status Flag output (requires an external pull-
up resistor to VDD. Maximum permissible load current < 0.5 mA. Maximum
VSFLOW < 0.4 V at 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.)
30
D3
Logic Input
Disable Input 3
(Active High)
When D3 is logic HIGH, both OUT3 and OUT4 are tri-stated. Schmitt trigger
input with ~80
μA source so default condition = disabled.
31
FBB
Analog
Output
Feedback B
H-Bridge B load current feedback output provides ground referenced 0.24% of
the high side output current. (Tie to GND through a resistor if not used.)
32
EN/D4
Logic Input
Enable Input
When EN/D4 is logic HIGH, H-Bridge B is operational. When EN/D4 is logic
LOW, the H-Bridge B outputs are tri-stated and H-Bridge B is placed in Sleep
Mode. (logic input with ~80
μA sink so default condition = Sleep Mode.)
37, 38
OUT3
Power
Output
H-Bridge Output 3
H-Bridge B Source of HS1 and drain of LS1.
44, 45
OUT2
Power
Output
H-Bridge Output 2
H-Bridge A source of HS2 and drain of LS2.
47
CCPA
Analog
Output
Charge Pump
Capacitor
External reservoir capacitor connection for H-Bridge A internal charge pump;
connected to VPWRA. Allowable values are 30 to 100 nF. Note: This capacitor
is required for the proper performance of the device.
50
IN2
Logic Input
Input 2
Logic input control of OUT2.
51
IN1
Logic Input
Input 1
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to
VPWRA, and when IN1 is logic LOW, OUT1 is set to PGNDA. (Schmitt trigger
Input with ~80
μA source so default condition = OUT1 HIGH.)
52
SFA
Logic
Output -
Open Drain
Status Flag
(Active Low)
H-Bridge A open drain active LOW Status Flag output (requires an external pull-
up resistor to VDD. Maximum permissible load current < 0.5 mA. Maximum
VSFLOW< 0.4 V at 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.)
54
27
AGNDA
AGNDB
Analog
Ground
Analog Signal
Ground
The low-current analog signal ground must be connected to PGND via low-
impedance path (<10 m
Ω, 0 Hz to 20 kHz).
2, 6 - 8, 14,
21, 22, 29,
33 - 35, 41,
48, 49
NC
None
No Connect
These pins have no electrical connection or function.
EP
EP
Thermal
Pad
Exposed Pad
Exposed TAB is also the main heatsinking path for the device and must be
connected to ground.
Table 1. 34932 Pin Definitions (continued)
Pin
Number
Pin Name
Pin
Function
Formal Name
Definition


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