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AD713JRZ16 Fiches technique(PDF) 13 Page - Analog Devices

No de pièce AD713JRZ16
Description  Precision, High Speed, BiFET Quad Op Amp
Download  20 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD713JRZ16 Fiches technique(HTML) 13 Page - Analog Devices

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AD713
Rev. F | Page 13 of 20
loop gain. At high frequencies, where the loop gain is low, the
amplifier output impedance can approach its open-loop value.
STS
1
(MSB) DB11
HIGH
BITS
MIDDLE
BITS
LOW
BITS
(LSB) DB0
2
DB10
3
DB9
4
28
27
AO
26
25
DB8
5
DB7
6
DB6
7
CE
24
REF OUT
23
AC
22
DB5
8
REF IN
21
DB4
9
VEE
20
DB3
10
BIP OFF
19
DB2
11
10VIN
18
DB1
12
VLOGIC
17
13
VCC
16
DC
14 20VIN
15
AD574A
TOP VIEW
(Not to Scale)
12/8
CS
R/C
GAIN ADJUST
±10V
ANALOG
INPUT
R2 100Ω
R1 100Ω
OFFSET ADJUST
ANALOG COM
1/4
AD713
+15V
0.1µF
4
–15V
0.1µF
11
Figure 37. AD713 as an ADC Buffer
Most IC amplifiers exhibit a minimum open-loop output imped-
ance of 25 Ω, due to current limiting resistors. A few hundred
microamps reflected from the change in converter loading can
introduce errors in instantaneous input voltage. If the analog-
to-digital conversion speed is not excessive and the bandwidth
of the amplifier is sufficient, the amplifier output returns to
the nominal value before the converter makes its comparison.
However, many amplifiers have relatively narrow bandwidths,
yielding slow recovery from output transients. The AD713 is
ideally suited as a driver for ADCs because it offers both a wide
bandwidth and a high open-loop gain.
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100
90
10
0%
1mV
AD713 BUFF
200ns
500mV
10V ADC IN
Figure 38. Buffer Recovery Time Source Current = 2 mA
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100
90
10
0%
1mV
AD713 BUFF
200ns
500mV
–5V ADC IN
Figure 39. Buffer Recovery Time Sink Current = 1 mA
Driving A Large Capacitive Load
The circuit of Figure 40 uses a 100 Ω isolation resistor that
enables the amplifier to drive capacitive loads exceeding
1500 pF; the resistor effectively isolates the high frequency
feedback from the load and stabilizes the circuit. Low frequency
feedback is returned to the amplifier summing junction via the
low-pass filter formed by the 100 Ω series resistor and the load
capacitance, CL. Figure 41 shows a typical transient response for
this connection.
+VS
–VS
1/4
AD713
4
11
0.1µF
30pF
4.99kΩ
4.99kΩ
CL RL
100Ω
0.1µF
OUTPUT
INPUT
TYPICAL CAPACITANCE
LIMIT FOR VARIOUS
LOAD RESISTORS
RL
2kΩ
10kΩ
20kΩ
CL UP TO
1500pF
1500pF
1000pF
Figure 40. Circuit for Driving a Large Capacitance Load
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100
90
10
0%
5V
1µs
Figure 41. Transient Response, RL = 2 kΩ, CL = 500 pF


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