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AD5024 Fiches technique(PDF) 19 Page - Analog Devices |
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AD5024 Fiches technique(HTML) 19 Page - Analog Devices |
19 / 28 page Data Sheet AD5024/AD5044/AD5064 Rev. F | Page 19 of 28 THEORY OF OPERATION DIGITAL-TO-ANALOG CONVERTER The AD5024/AD5044/AD5064/AD5064-1 are single 12-/14-/ 16-bit, serial input, voltage output DACs with an individual reference pin. The AD5064-1 model (see the Ordering Guide) is a 16-bit, serial input, voltage output DAC that is identical to other AD5064 models but with a single reference pin for all DACs. The parts operate from supply voltages of 4.5 V to 5.5 V. Data is written to the AD5024/AD5044/AD5064/AD5064-1 in a 32-bit word format via a 3-wire serial interface. The AD5024/ AD5044/AD5064/AD5064-1 incorporate a power-on reset circuit that ensures that the DAC output powers up to a known output state. The devices also have a software power-down mode that reduces the typical current consumption to typically 400 nA. Because the input coding to the DAC is straight binary, the ideal output voltage when using an external reference is given by × = N REFIN OUT D V V 2 where: D is the decimal equivalent of the binary code that is loaded to the DAC register (0 to 65,535 for the 16-bit AD5064). N is the DAC resolution. DAC ARCHITECTURE The DAC architecture of the AD5064 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 46. The four MSBs of the 16-bit data word are decoded to drive 15 switches, E1 to E15. Each of these switches connects one of 15 matched resistors to either GND or the VREF buffer output. The remaining 12 bits of the data-word drive the S0 to S11 switches of a 12-bit voltage mode R-2R ladder network. 2R S0 VREF 2R S1 2R S11 2R E1 2R E2 2R E15 2R VOUT 12-BIT R-2R LADDER FOUR MSBs DECODED INTO 15 EQUAL SEGMENTS Figure 46. DAC Ladder Structure REFERENCE BUFFER The AD5024/AD5044/AD5064/AD5064-1 operate with an exter- nal reference. For most models, each DAC has a dedicated voltage reference pin. The AD5064-1 model has a single voltage reference pin for all DACs. The reference input pin has an input range of 2.2 V to VDD. This input voltage is then buffered internally to provide a reference for the DAC core. OUTPUT AMPLIFIER The output buffer amplifier can generate rail-to-rail voltages on its output, which gives an output range of 0 V to VDD. The amplifier is capable of driving a load of 5 kΩ in parallel with 200 pF to GND. The slew rate is 1.5 V/µs with a ¼ to ¾ scale settling time of 5.8 µs. SERIAL INTERFACE The AD5024/AD5044/AD5064/AD5064-1 have a 3-wire serial interface (SYNC, SCLK, and DIN) that is compatible with SPI, QSPI, and MICROWIRE interface standards as well as most DSPs. See Figure 4 for a timing diagram of a typical write sequence. The AD5064-1 model contains an SDO pin to allow the user to daisy-chain multiple devices together (see the Daisy- Chaining section). SHIFT REGISTER The AD5024/AD5044/AD5064/AD5064-1 shift register is 32 bits wide. The first four bits are don’t cares. The next four bits are the command bits, C3 to C0 (see Table 8), followed by the 4-bit DAC address bits, A3 to A0 (see Table 9), and finally the bit data-word. The data-word comprises 12-bit, 14-bit, or 16-bit input code, followed by eight, six, or four don’t care bits for the AD5024, AD5044, and AD5064/AD5064-1, respectively (see Figure 47, Figure 48, and Figure 49). These data bits are transferred to the DAC register on the 32nd falling edge of SCLK. Commands can be executed on individually selected DAC channels or on all DACs. Table 8. Command Definitions Command C3 C2 C1 C0 Description 0 0 0 0 Write to Input Register n 0 0 0 1 Update DAC Register n 0 0 1 0 Write to Input Register n, update all (software LDAC) 0 0 1 1 Write to and update DAC Channel n 0 1 0 0 Power down/power up DAC 0 1 0 1 Load clear code register 0 1 1 0 Load LDAC register 0 1 1 1 Reset (power-on reset) 1 0 0 0 Set up DCEN register1 (daisy-chain enable) 1 0 0 1 Reserved 1 1 1 1 Reserved 1 Available in the AD5064-1 14-lead TSSOP package only. Table 9. Address Commands Address (n) Selected DAC Channel A3 A2 A1 A0 0 0 0 0 DAC A 0 0 0 1 DAC B 0 0 1 0 DAC C 0 0 1 1 DAC D 1 1 1 1 All DACs |
Numéro de pièce similaire - AD5024 |
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Description similaire - AD5024 |
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