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AD5024 Fiches technique(PDF) 4 Page - Analog Devices

No de pièce AD5024
Description  Fully Accurate, 12-/14-/16-Bit VOUT nanoDAC, Quad, SPI Interface, 4.5 V to 5.5 V in TSSOP
Download  28 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD5024 Fiches technique(HTML) 4 Page - Analog Devices

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AD5024/AD5044/AD5064
Data Sheet
Rev. F | Page 4 of 28
Parameter
B Grade1
A Grade1, 2
Unit
Conditions/Comments
Min
Typ
Max
Min
Typ
Max
LOGIC OUTPUTS (SDO)9
Output Low Voltage, VOL
0.4
0.4
V
ISINK = 2 mA
Output High Voltage, VOH
VDD − 1
VDD − 1
ISOURCE = 2 mA
High Impedance Leakage
Current
±0.002
±1
±0.002
±1
μA
High Impedance Output
Capacitance6
7
7
pF
POWER REQUIREMENTS
VDD
4.5
5.5
4.5
5.5
V
DAC active, excludes load current
IDD10
VIH = VDD, VIL = GND, Code = midscale
Normal Mode
4
6
4
6
mA
All Power-Down Modes11
0.4
2
0.4
2
µA
TA = −40°C to +105°C
30
30
µA
TA = −40°C to +125°C
1
Temperature range is −40°C to +125°C, typical at 25°C.
2
A grade offered in AD5064 only.
3
Linearity and total unadjusted error are calculated using a reduced code range—AD5064/AD5064-1: Code 512 to Code 65,024; AD5044: Code 128 to Code 16,256;
AD5024: Code 32 to Code 4064. Output unloaded.
4
See the Terminology section.
5
Offset error calculated using a reduced code range—AD5064/AD5064-1: Code 512 to Code 65,024; AD5044: Code 128 to Code 16,256; AD5024: Code 32 to Code 4064.
Output unloaded
6
Guaranteed by design and characterization; not production tested.
7
Time to exit power-down mode to normal mode; 32nd clock edge to 90% of DAC midscale value, output unloaded.
8
Current flowing into individual digital pins. VDD = 5.5 V; VREF = 4.096 V; Code = midscale.
9
AD5064-1 only.
10
Interface inactive. All DACs active. DAC outputs unloaded.
11
All four DACs powered down.
AC CHARACTERISTICS
VDD = 4.5 V to 5.5 V, RL = 5 kΩ to GND, CL = 200 pF to GND, 2.5 V ≤ VREFIN ≤ VDD. All specifications TMIN to TMAX, unless otherwise
noted.
Table 3.
Parameter1, 2
Min
Typ
Max
Unit
Conditions/Comments3
Output Voltage Settling Time
5.8
8
µs
¼ to ¾ scale and ¾ to ¼ scale settling to ±1 LSB, RL = 5 kΩ,
single-channel update
10.7
13
µs
¼ to ¾ scale and ¾ to ¼ scale settling to ±1 LSB, RL = 5 kΩ, all channel
update
Slew Rate
1.5
V/µs
Digital-to-Analog Glitch Impulse
3
nV-sec
1 LSB change around major carry
Reference Feedthrough
−90
dB
VREF = 3 V ± 0.86 V p-p, frequency = 100 Hz to 100 kHz
Digital Feedthrough
0.1
nV-sec
Digital Crosstalk
1.9
nV-sec
Analog Crosstalk
2
nV-sec
DAC-to-DAC Crosstalk
3.5
nV-sec
AC Crosstalk
6
nV-sec
Multiplying Bandwidth
340
kHz
VREF = 3 V ± 0.86 V p-p
Total Harmonic Distortion
−80
dB
VREF = 3 V ± 0.2 V p-p, frequency = 10 kHz
Output Noise Spectral Density
64
nV/√Hz
DAC code = 0x8400, frequency = 1 kHz
60
nV/√Hz
DAC code = 0x8400, frequency = 10 kHz
Output Noise
6
μV p-p
0.1 Hz to 10 Hz
1
Guaranteed by design and characterization; not production tested.
2
See the Terminology section.
3
Temperature range is −40°C to +125°C, typical at 25°C.


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