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SPT8100 Fiches technique(PDF) 6 Page - Fairchild Semiconductor

No de pièce SPT8100
Description  16-BIT, 5 MSPS CMOS A/D CONVERTER
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

SPT8100 Fiches technique(HTML) 6 Page - Fairchild Semiconductor

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6
1/9/02
SPT8100
Figure 2a – Typical Interface Circuit
Mini-Circuit
T1-6T
Transformer
+A5V
+A3.3/5V
VIN+
VIN
VCM
AIN
16
D0–15
Logic
Interfacing
Circuit
+D3.3/5V
+
0.1
0.1
SPT8100
FB1
BIASC
BIASR
1.0
1.43K
RT
(50)
RDY
OVR
0.1
Gain Control
Output
Enable
(active Hi)
Clock
Input
VRT
VRB
+
10
0.1
1nF
4.7
10
+
10
REXT
AVDD DVDD AGND DGND OGND OVDD
GS2 GS1
GS0
OE
CLK
RS
Reset
.01
+
+
Figure 2b – Typical Interface Circuit
+
+A5V
+D3.3/5V
+
FB1
FB3
FB2
0.1
10
0.1
10
Mini-Circuit
T1-6T
Transformer
VIN+
VIN
VCM
AIN
16
D0–15
Logic
Interfacing
Circuit
SPT8100
BIASC
BIASR
.01
1.43K
RT
(50)
RDY
OVR
Gain Control
Output
Enable
(active Hi)
Clock
Input
VRT
VRB
+
10
0.1
1nF
REXT
AVDD DVDD AGND DGND
OGND
OVDD
GS2 GS1
GS0
OE
CLK
RS
Reset
1.0
+
0.1
4.7
+
Notes:
1. To avoid device latch-up, closely follow either figure 2a or 2b, depending on what is available in the system. The difference between figure 2a
and 2b is in the grounding.
2. FB = ferrite bead. FB1 must be placed as close to the device as possible.
3. REXT = 1.43 kΩ, optimized for ƒS = 5 MSPS. Refer to the above table for recommended value of REXT with respect to ƒS and ƒIN.
4. RT is AIN source termination resistor.
5. Power supplies and references pins must have adequate decoupling. Surface-mount capacitors are highly recommended. The smallest value
of capacitors are to be placed as close to the pin as possible.
ƒS (MSPS) REXT (k
Ω)
ƒIN
–5
1.43
<2 MHz
–2
2.00
<2 MHz
–5
1.24
•2 MHz
–2
1.00
•2 MHz
800
Ω – REXT – 2.5 kΩ


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