Moteur de recherche de fiches techniques de composants électroniques |
|
SPT8100 Fiches technique(PDF) 3 Page - Fairchild Semiconductor |
|
SPT8100 Fiches technique(HTML) 3 Page - Fairchild Semiconductor |
3 / 10 page 3 1/9/02 SPT8100 ELECTRICAL SPECIFICATIONS TA=TMIN to TMAX, AVDD=DVDD=+5.0 V, OVDD= 3.3 V, ƒS=5 MSPS, 2.5 VPP input span, Gain=0 dB, REXT=1.43 kΩ, unless otherwise specified. TEST TEST SPT8100 PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS Dynamic Performance1 Effective Number of Bits ADC Input = –1 dBFS2 ƒIN = 60 kHz IV 12.2 13.0 Bits ƒIN = 900 kHz V 12.7 Bits Signal-to-Noise Ratio (without Harmonics) ADC Input = –1 dBFS2 ƒIN = 75 kHz IV 78 81 dB ƒIN = 900 kHz V 80 dB Harmonic Distortion ADC Input = –0.5 dBFS ƒIN = 60 kHz IV –92 –84 dB ƒIN = 900 kHz V –82 dB Signal-to-Noise and Distortion (SINAD) ADC Input = –1 dBFS ƒIN = 60 kHz IV 75 80 dB ƒIN = 900 kHz V 78 dB Spurious Free Dynamic Range3 ƒIN = 60 kHz ADC Input = –0.5 dB IV 85 94 dBc ƒIN = 900 kHz V 94 dBc ƒIN = 2 MHz REXT = 1 kΩ @ 10 MSPS V 83 dBc ƒIN = 3 MHz REXT = 1 kΩ @ 10 MSPS V 78 dBc Two-Tone Intermodulation 3rd Order Distortion ƒ1=400 kHz, ƒ2=410 kHz4 V –94 dB ƒ1=890 kHz, ƒ2=900 kHz5 V –89 dB Inputs GS0–GS2 Logic 1 Voltage VI 2.4 V GS0–GS2 Logic 0 Voltage VI 0.8 V CLK, RS Logic 1 Voltage VI 2.0 V CLK, RS Logic 0 Voltage VI 0.8 V Maximum Input Current Low VI –10 +10 µA Maximum Input Current High VI –10 +10 µA Input Capacitance V 5 pF Digital Outputs Logic 1 Voltage IOH = –2 mA VI OVDD – 0.5 V Logic 0 Voltage IOL = 2 mA VI 0.4 V CLK to Output Delay Time (tD)CLOAD = 20 pF IV 30 ns Power Supply Requirements Voltages OVDD IV 3.0 3.3 5.25 V AVDD IV 4.75 5.0 5.25 V DVDD IV 4.75 5.0 5.25 V Currents IDD VI 93 103 mA Power Dissipation VI 465 515 mW 1 Dynamic performance tested at ƒS=4.4 MSPS 2 0 dBFS is 5.0 V peak-to-peak differential 3 ADC Input = –8.1 dBFS, unless otherwise noted 4 Test Conditions: PGA setting of 5.8 dB; Analog Input at ADC = –0.7 dB 5 Test Conditions: PGA setting of 0 dB; Analog Input at ADC = –1.9 dB TEST LEVEL CODES All electrical characteristics are subject to the following conditions: All parameters having min/max specifi- cations are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any blank section in the data column indicates that the specification is not tested at the specified condition. TEST LEVEL TEST PROCEDURE I 100% production tested at the specified temperature. II 100% production tested at TA = +25 °C, and sample tested at the specified temperatures. III QA sample tested only at the specified temperatures. IV Parameter is guaranteed (but not tested) by design and characteriza- tion data. V Parameter is a typical value for information purposes only. VI 100% production tested at TA = +25 °C. Parameter is guaranteed over specified temperature range. |
Numéro de pièce similaire - SPT8100 |
|
Description similaire - SPT8100 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |