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TPS7A6633QDGNRQ1 Fiches technique(PDF) 10 Page - Texas Instruments

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No de pièce TPS7A6633QDGNRQ1
Description  High-Voltage Ultralow-Iq Low-Dropout Regulator
Download  26 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TPS7A6633QDGNRQ1 Fiches technique(HTML) 10 Page - Texas Instruments

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TPS7A6601-Q1, TPS7A6633-Q1
TPS7A6650-Q1, TPS7A6933-Q1
TPS7A6950-Q1
SLVSBL0B – DECEMBER 2012 – REVISED AUGUST 2013
www.ti.com
TYPICAL CHARACTERISTICS (continued)
All oscilloscope waveforms were taken at room temperature.
Figure 16. Load Transient Response, 10 ms/div
Figure 17. Line Transient Response, Iload = 1 mA, 1 V/µs
Figure 18. Line Transient Response, Iload = 10 mA, 1 V/µs
DETAILED DESCRIPTION
This product is a combination of a low-dropout linear regulator with reset function. The power-on-reset initializes
once the output Vout exceeds 91.6% of the target value. The power-on-reset delay is a function of the value set
by an external capacitor on the Rdelay pin before releasing the RST terminal high.
Enable (EN):
This is a high-voltage-tolerant terminal; high input actives the device and turns the regulator ON. One can
connect this input to the Vin terminal for self-bias applications.
Regulated Output (Vout):
This is the regulated output based on the required voltage. The output has current limitation. During initial power
up, the regulator has a soft start incorporated to control initial current through the pass element and the output
capacitor.
In the event the regulator drops out of regulation, the output tracks the input minus a drop based on the load
current. When the input voltage drops below the UVLO threshold, the regulator shuts down until the input voltage
recovers above the minimum start-up level.
Power-On-Reset (PG):
This is an output with an external pullup resistor to the regulated supply. The output remains low until the
regulated Vout has exceeded approximately 90% of the set value and the power-on-reset delay has expired. The
on-chip oscillator presets the delay. The regulated output falling below the 90% level asserts this output low after
a short de-glitch time of approximately 50 µs (typical).
Reset Delay Timer (CT):
10
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Product Folder Links: TPS7A6601-Q1 TPS7A6633-Q1 TPS7A6650-Q1 TPS7A6933-Q1 TPS7A6950-Q1


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