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74LCX00 Fiches technique(PDF) 1 Page - Fairchild Semiconductor |
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74LCX00 Fiches technique(HTML) 1 Page - Fairchild Semiconductor |
1 / 13 page ©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX00 Rev. 1.7.0 February 2008 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs Features ■ 5V tolerant inputs ■ 2.3V–3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high impedance inputs and outputs ■ ±24mA output drive (VCC = 3.0V) ■ ■ Latch-up performance exceeds JEDEC 78 conditions ■ ESD performance: – Human body model > 2000V – Machine model > 200V ■ Leadless DQFN package General Description The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS tech- nology to achieve high speed operation while maintain- ing CMOS low power dissipation. Ordering Information Note: 1. DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Order Number Package Number Package Description 74LCX00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX00BQX(1) MLP14A 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 74LCX00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Implements proprietary noise/EMI reduction circuitry |
Numéro de pièce similaire - 74LCX00_08 |
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Description similaire - 74LCX00_08 |
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