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DAC56U Fiches technique(PDF) 4 Page - Texas Instruments |
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DAC56U Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 6 page ® DAC56 4 OPERATING INSTRUCTIONS The accuracy of a D/A converter is described by the transfer function as shown in Figure 1. Digital input to analog output converter relationships are shown in Table I. The errors in the D/A converter are combinations of analog errors due to the linear circuitry, matching and tracking properties of the ladder and scaling networks, power supply rejection, and reference errors. In summary, these errors consist of initial errors including gain, offset, linearity, differential linearity, and power supply sensitivity. Gain drift over temperature rotates the line (Figure 1) about the bipolar zero point and offset drift shifts the line left or right over the operating temperature range. Most of the offset and gain drift is due to the drift of the internal reference zener diode with tempera- ture or time. The converter is designed so that these drifts are in opposite directions. This way the bipolar zero voltage is virtually unaffected by variations in the reference voltage. DIGITAL INPUT CODES The DAC56 accepts serial input data (MSB first) in Binary Two’s Complement form—Refer to Table I for input/output relationships. POWER SUPPLY CONNECTIONS Power supply decoupling capacitors should be added as shown in the Connection Diagram (Figure 2), for optimum performance and noise rejection. These capacitors (1 µF tantalum recommended) should be connected as close as possible to the converter. FIGURE 2. Connection Diagram. MSB ERROR ADJUSTMENT (OPTIONAL) Differential linearity error at all codes of the DAC56 is guaranteed to meet specifications without an external adjust- ment. However, if adjustment of the differential linearity error at bipolar zero is desired, it can be trimmed essentially to zero using the circuit as shown in Figure 3. FIGURE 3. MSB Adjustment Circuit. After allowing ample warm-up time (5 to 10 minutes) to assure stable operation, select the input code FFFF H. Mea- sure the output voltage using a 6-1/2 digit voltmeter and record the measurement. Change the digital input code to 0000 H. Adjust the 100kΩ potentiometer (TCR of 100ppm per °C or less is recommended) to make the output voltage read 1LSB more than the voltage reading of the previous code (ex. 1LSB = 92 µV at FSR = 6V). If the MSB adjustment circuit is not used, pins 14 and 15 should be left open. FIGURE 1. Input vs Output for an Ideal Bipolar D/A Converter. DIGITAL INPUT ANALOG OUTPUT Binary Two’s Voltage (V), Current (mA), Complement (BTC) DAC Output VOUT Mode IOUT Mode 7FFFH + Full Scale +2.999908 –0.999970 8000H – Full Scale –3.000000 +1.000000 0000H Bipolar Zero 0.000000 0.000000 FFFFH Zero –1LSB –0.000092 +0.030500 µA TABLE I. Digital Input to Analog Output Relationship. 470k Ω 200k Ω 100k Ω(1) Trim 15 MSB Adjust 14 1 –V S NOTE: (1) 10-15 turns. Gain Drift Offset Drift Bipolar Zero 0111...1111 1000...0000 Digital Output (+FSR/2) –1LSB –FSR/2 All Bits On * See Table I for digital code definitions. 16-Bit DAC Latch 16-Bit Serial to Parallel Conversion Control Logic and Level Shifting Circuit 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 16-Bit I OUT DAC –5V +5V –5V 1µF 1µF 1µF LCOM –V S +V L NC CLK LE Data –V L +V S SJ R F V OUT (±3.0V) TRIM MSB ADJ I OUT Analog Output 1µF +5V ACOM NOTES: = Analog Common = Logic Common |
Numéro de pièce similaire - DAC56U |
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Description similaire - DAC56U |
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