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TPS7A8300RGWR Fiches technique(PDF) 1 Page - Texas Instruments

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No de pièce TPS7A8300RGWR
Description  2-A, 6-VRMS, RF, LDO Voltage Regulator
Download  33 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

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TPS7A8300
RF LDO
Amplifier
TPS7A33
Negative-Voltage
Regulator
TPS7A8300
www.ti.com
SBVS197C – MAY 2013 – REVISED JULY 2013
2-A, 6-µVRMS, RF, LDO Voltage Regulator
Check for Samples: TPS7A8300
1
FEATURES
DESCRIPTION
The TPS7A8300 is a low-noise (6 µVRMS), low-
23
Ultralow Dropout: 125 mV Maximum at 2 A
dropout voltage regulator (LDO) capable of sourcing
Output Voltage Noise: 6 µVRMS
a 2-A load with only 125 mV of maximum dropout.
Power-Supply Ripple Rejection:
The TPS7A8300 output voltages are fully user-
40 dB at 1 MHz
adjustable (up to 3.95 V) using a printed circuit board
Input Voltage Range:
(PCB) layout without the need of external resistors or
feed-forward
capacitors,
thus
reducing
overall
Without BIAS: +1.4 V to +6.5 V
component
count.
For
higher
output
voltage
With BIAS: +1.1 V to +6.5 V
applications, the device achieves output voltages up
Two Output Voltage Modes:
to 5 V with the use of external resistors. The device
supports very low input voltages (down to 1.1 V) with
ANY-OUT™ Version (User-Programmable
the use of an additional BIAS rail.
Output via PCB Layout):
With very high accuracy (1% over line, load, and
No External Resistor or Feed-Forward
temperature),
remote
sensing,
and
soft-start
Capacitors Required
capabilities to reduce inrush current, the TPS7A8300
Output Voltage Range: +0.8 V to 3.95 V
is ideal for powering high-current, low-voltage devices
Adjustable Version:
such
as
high-end
microprocessors
and
field-
programmable gate arrays (FPGAs).
Output Voltage Range: +0.8 V to 5.0 V
1.0% Accuracy Over Line, Load, and
The TPS7A8300 is designed to power-up noise-
Temperature
sensitive components in high-speed communication
applications. The very low-noise, 6-µVRMS device
Stable with a 22-µF Output Ceramic Capacitor
output and high broad-bandwidth PSRR (40 dB at
Programmable Soft-Start and Power-Good
1 MHz) minimizes phase noise and clock jitter in
(PG) Output
high-frequency signals. These features maximize
Available Packages:
performance of clocking devices, analog-to-digital
converters (ADCs), and digital-to-analog converters
5-mm × 5-mm QFN-20
(DACs).
3,5-mm × 3,5-mm QFN-20 (1)
For applications where positive and negative low-
(1)
3,5-mm × 3,5-mm QFN-20 package is product-preview.
noise rails are required, consider TI's TPS7A33 family
of
negative
high-voltage,
ultralow-noise
linear
APPLICATIONS
regulators.
RF, IF Components: VCO, ADC, DAC, LVDS
Wireless Infrastructure: SerDes, FPGA, DSP™
Test and Measurement
Instrumentation, Medical, and Audio
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
ANY-OUT, DSP, PowerPAD are trademarks of Texas Instruments.
3
All other trademarks are the property of their respective owners.
UNLESS
OTHERWISE
NOTED
this
document
contains
Copyright © 2013, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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