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AD9248BCPZRL-65 Fiches technique(PDF) 4 Page - Analog Devices

No de pièce AD9248BCPZRL-65
Description  14-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter
Download  48 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9248BCPZRL-65 Fiches technique(HTML) 4 Page - Analog Devices

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AD9248
Rev. B | Page 4 of 48
Test
AD9248BST/BCP-20
AD9248BST/BCP-40
AD9248BST/BCP-65
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
MATCHING CHARACTERISTICS
Offset Error
(Nonshared Reference Mode)
25°C
I
±0.19
±1.56
±0.19
±1.56
±0.25
±1.74
% FSR
Offset Error
(Shared Reference Mode)
25°C
I
±0.19
±1.56
±0.19
±1.56
±0.25
±1.74
% FSR
Gain Error
(Nonshared Reference Mode)
25°C
I
±0.07
±1.43
±0.07
±1.43
±0.07
±1.47
% FSR
Gain Error
(Shared Reference Mode)
25°C
I
±0.01
±0.06
±0.01
±0.06
±0.01
±0.10
% FSR
1 Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0 V external reference).
2 Measured at maximum clock rate with a low frequency sine wave input and approximately 5 pF loading on each output bit.
3 Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure
for the equivalent analog input structure.
29
4 Measured with dc input at maximum clock rate.
5 Standby power is measured with the CLK_A and CLK_B pins inactive (that is, set to AVDD or AGND).


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