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AD5061 Fiches technique(PDF) 3 Page - Analog Devices |
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AD5061 Fiches technique(HTML) 3 Page - Analog Devices |
3 / 24 page AD5040/AD5060 Rev. A | Page 3 of 24 SPECIFICATIONS VDD = 5.5 V, VREF = 4.096 V @ RL = unloaded, CL = unloaded; TMIN to TMAX, unless otherwise noted. Table 2. A, B, and Y Grades1 Parameter Min Typ Max Unit Test Conditions/Comments STATIC PERFORMANCE Resolution 16 Bits AD5060 14 Bits AD5040 Relative Accuracy (INL)2 ±0.5 ±2 LSB −40°C to +85°C, AD5040/AD5060 A grade ±0.5 ±1 LSB −40°C to +85°C, AD5040/AD5060 B grade ±0.5 ±1.5 −40°C to +125°C, AD5060 Y grade Total Unadjusted Error (TUE)2 ±0.1 ±2.0 mV −40°C to +85°C, AD5040/AD5060 ±0.1 ±2.0 −40°C to +125°C, AD5060 Y grade Differential Nonlinearity (DNL)2 ±0.5 ±1 LSB Guaranteed monotonic, −40°C to +85°C, AD5040/AD5060 ±0.5 ±1 Guaranteed monotonic, −40°C to +125°C, Y grade Gain Error ±0.01 ±0.02 % of FSR TA = −40°C to +85°C, AD5040/AD5060 ±0.01 ±0.03 TA = −40°C to +125°C AD5060 Y grade Gain Error Temperature Coefficient 1 ppm of FSR/°C Offset Error ±0.02 ±1.5 mV TA = −40°C to + 85°C, AD5040/AD5060 ±0.02 ±2.0 TA = −40°C to + 125°C, AD5060 Y grade Offset Error Temperature Coefficient 0.5 μV/°C Full-Scale Error ±0.05 ±2.0 mV All 1s loaded to DAC register, AD5040 AD5060; TA = −40°C to +85°C ±0.05 ±2.0 All 1s loaded to DAC register, TA = −40°C to +125°C, AD5060 Y grade OUTPUT CHARACTERISTICS3 Output Voltage Range 0 VREF V Output Voltage Settling Time 4 μs ¼ scale to ¾ scale code transition to ±1 LSB, RL = 5 kΩ Output Noise Spectral Density 64 nV/ √Hz DAC code = midscale, 1 kHz Output Voltage Noise 6 μV p-p DAC code = midscale , 0.1 Hz to 10 Hz bandwidth Digital-to-Analog Glitch Impulse 2 nV-s 1 LSB change around code 57386, RL = 5 kΩ, CL = 200 pF Digital Feedthrough 0. 003 nV-s DAC code = full scale DC Output Impedance (Normal) 0. 015 Ω Output impedance tolerance ±10% DC Output Impedance (Power-Down) (Output Connected to 1 kΩ Network)4 1 kΩ Output impedance tolerance ±400 Ω (Output Connected to 100 kΩ Network) 100 kΩ Output impedance tolerance ±20 kΩ Capacitive Load Stability 1 nF Loads used RL = 5 kΩ, RL = 100 kΩ, RL = ∞ Slew Rate 1. 2 V/μs ¼ scale to ¾ scale code transition to ±1 LSB, RL = 5 kΩ, CL = 200 pF Short-Circuit Current 60 ma DAC code = full scale, output shorted to GND, TA = 25°C 45 DAC code = zero scale, output shorted to VDD, TA = 25°C DAC Power-Up Time 4.5 μs Time to exit power-down mode to normal mode of AD5060, 24th clock edge to 90% of DAC final value, output unloaded DC Power Supply Rejection Ratio −92.11 db VDD ± 10%, DAC code = full scale |
Numéro de pièce similaire - AD5061 |
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Description similaire - AD5061 |
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