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Moteur de recherche de fiches techniques de composants électroniques |
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DAC3283 Fiches technique(PDF) 1 Page - Texas Instruments |
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DAC3283 Fiches technique(HTML) 1 Page - Texas Instruments |
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1 / 49 page  C6748 DSP GC533x DUC-CFR DPD DDC DAC DAC I/QMod I/QMod I/QMod I/QMod PA PA PA PA SW Baseband Data DAC3484 ADS61B49 TRF3703/3720 Complex TX Subsampled Feedback Mixer/BPF Mixer/BPF Mixer/BPF Mixer/BPF Mixer/BPF LNA LNA LNA LNA ADS62P49 ADS62P49 RX FB I/Q I/Q RX RX RX Real RX Real RX B0441-01 ADC ADC ADC ADC ADC GC5330 GC5337 www.ti.com SLWS226 B – DECEMBER 2010 – REVISED JANUARY 2011 Wideband Transmit-Receive Digital Signal Processors Check for Samples: GC5330, GC5337 1 FEATURES APPLICATIONS • Multi-Standard Base Stations • Integrated Transmit and Receive Digital IF Solution • 3GPP (LTE, W-CDMA, TDS-CDMA) • MC-GSM • Up to 4 TX, 8 RX, Plus DPD Feedback • WiMAX and WiBro (OFDMA) • TX-Transmit Includes DUC, CFR, DPD, TX • Multi-Carrier Power Amplifiers (MCPAs) Equalizer, and Bulk Upconverter • Wireless Infrastructure Repeaters • 62-MHz TX Signal Bandwidth With Fifth-Order DPD Correction • Up to 4 × 4 MIMO • CFR: 6-dB PAR for WCDMA, 7-db LTE Signals DESCRIPTION With EVM Meeting 3GPP Specs; Configurable for All Major Wireless Infrastructure Standards The GC533x is a wideband transmit and receive signal processor that includes digital downconverter / • DPD: Memory Compensation, Typical ACLR upconverter (DDUC), transmit, receive, and capture Improvement of 20 dB or More buffer blocks. The transmit path includes crest factor • RX-Receive Includes DC-Offset Cancellation, reduction (CFR), digital predistortion (DPD) and Front-End and Back-End AGC, Bulk associated feedback path, complex equalization, and Downconverter, RX Equalizer, I/Q Imbalance bulk upconversion. Correction, DDC The receive path includes wideband and narrowband • 4 DDUCs, 1 –12 Channels per DDUC, Each automatic gain control (AGC), bulk downconversion, DDUC Can Be Programmed to TX or RX, at a complex equalization, and I/Q imbalance correction. Common Resampler Rate – Multimode The DDUC section consists of four identical DDUC Support blocks, each supporting up to 12 channels. Each • Seamless Interface to TI High-Speed Data channel has independent fractional resamplers and Converters NCOs to enable flexible carrier configurations. • 4 TX Aggregate Output to DACs up to Multi-mode/multi-standard operation can be supported by configuring the individual DDUC blocks 930 MSPS Complex to different filtering and oversampling scenarios. • 8 RX Aggregate Input From ADCs up to 1.24 GSPS Real • Supports Envelope Tracking Techniques • 16-Tap (Complex) RX Equalizers • Two 4K Complex Word Capture Buffers for Signal Analysis, Adaptive Filtering, and DPD Algorithms • TMS320C6748 DPD Optimization Software • 1.1-V Core, 3.3-V I/O CMOS, 1.8-V I/O LVDS • Power Consumption, 3.5 W Typical • 484-Ball TE-PBGA Package, 23 mm × 23 mm 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. © 2010–2011, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Numéro de pièce similaire - DAC3283 |
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Description similaire - DAC3283 |
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