Moteur de recherche de fiches techniques de composants électroniques |
|
CD74HC194PWE4 Fiches technique(PDF) 1 Page - Texas Instruments |
|
CD74HC194PWE4 Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 19 page 1 Data sheet acquired from Harris Semiconductor SCHS164G Features • Four Operating Modes - Shift Right, Shift Left, Hold and Reset • Synchronous Parallel or Serial Operation • Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25 oC • Asynchronous Master Reset • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Pinout CD54HC194 (CERDIP) CD74HC194 (PDIP, SOIC, SOP, TSSOP) CD74HCT194 (PDIP) TOP VIEW Description The ’HC194 and CD74HCT194 are 4-bit shift registers with Asynchronous Master Reset (MR). In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift left mode, and at the shift right (DSR) serial input for the shift right mode. Clearing the register is accomplished by a Low applied to the Master Reset (MR) pin. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 MR DSR D0 D1 D2 D3 GND DSL VCC Q1 Q2 Q3 CP S1 S0 Q0 Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC194F3A -55 to 125 16 Ld CERDIP CD74HC194E -55 to 125 16 Ld PDIP CD74HC194M -55 to 125 16 Ld SOIC CD74HC194MT -55 to 125 16 Ld SOIC CD74HC194M96 -55 to 125 16 Ld SOIC CD74HC194NSR -55 to 125 16 Ld SOP CD74HC194PW -55 to 125 16 Ld TSSOP CD74HC194PWR -55 to 125 16 Ld TSSOP CD74HC194PWT -55 to 125 16 Ld TSSOP CD74HCT194E -55 to 125 16 Ld PDIP NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250. September 1997 - Revised May 2006 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2006, Texas Instruments Incorporated CD54HC194, CD74HC194, CD74HCT194 High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register [ /Title (CD74 HC194, CD74H CT194) /Sub- ject (High- Speed CMOS Logic 4-Bit |
Numéro de pièce similaire - CD74HC194PWE4 |
|
Description similaire - CD74HC194PWE4 |
|
|
Lien URL |
Politique de confidentialité |
ALLDATASHEET.FR |
ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |